8535AG-01LFT IDT, Integrated Device Technology Inc, 8535AG-01LFT Datasheet

8535AG-01LFT

Manufacturer Part Number
8535AG-01LFT
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Driverr
Datasheet

Specifications of 8535AG-01LFT

Number Of Clock Inputs
2
Mode Of Operation
Single-Ended
Output Frequency
266MHz
Output Logic Level
LVPECL
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Package Type
TSSOP
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Signal Type
LVCMOS/LVTTL
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Compliant
LOW SKEW, 1-to-4 LVCMOS/LVTTL-TO-
3.3V LVPECL FANOUT BUFFER
B
IDT
G
single ended clock input accepts LVCMOS or LVTTL input lev-
els and translate them to 3.3V LVPECL levels. The clock en-
able is internally synchronized to eliminate runt clock pulses
on the output during asynchronous assertion/deassertion of
the clock enable pin.
Guaranteed output and part-to-part skew characteristics make
the ICS8535-01 ideal for those applications demanding well
defined performance and repeatability.
HiPerClockS™
IC S
LOCK
ENERAL
CLK_SEL
/ ICS
CLK_EN
CLK0
CLK1
3.3V LVPECL FANOUT BUFFER
D
The ICS8535-01 is a low skew, high performance
1-to-4 LVCMOS/LVTTL-to-3.3V LVPECL fanout
buffer and a member of the HiPerClockS™ family
of High Performance Clock Solutions from IDT. The
ICS8535-01 has two single ended clock inputs. the
IAGRAM
D
ESCRIPTION
0
1
D
LE
Q
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
1
P
F
Four differential 3.3V LVPECL outputs
Selectable CLK0 or CLK1 inputs for redundant
and multiple frequency fanout applications
CLK0 or CLK1 can accept the following input levels: LVCMOS
or LVTTL
Maximum output frequency: 266MHz
Translates LVCMOS and LVTTL levels to
3.3V LVPECL levels
Output skew: 30ps (maximum)
Part-to-part skew: 250ps (maximum)
Propagation delay: 1.9ns (maximum)
Additve phase jitter, RMS: < 0.09ps (typical)
3.3V operating supply
0°C to 70°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
IN
EATURES
A
SSIGNMENT
4.4mm x 6.5mm x 0.92mm body package
4mm x 4mm x 0.9mm body package
CLK_EN
nQ3
V
V
CLK_SEL
Q3
CC
CLK_EN
EE
CLK0
CLK1
V
V
1
2
3
4
5
nc
nc
nc
nc
20-Lead VFQFN
ICS8535AG-01 REV. F OCTOBER 27, 2008
CC
20-Lead TSSOP
EE
ICS8535-01
ICS8535-01
20 19 18 17 16
6
G Package
K Package
Top View
Top View
7
1
2
3
4
5
6
7
8
9
10
8
20
19
18
17
16
15
14
13
12
11
9
10
Q0
nQ0
V
Q1
nQ1
Q2
nQ2
V
Q3
nQ3
15
14
13
12
11
CC
CC
ICS8535-01
V
Q2
nQ2
V
nc
CC
CC

Related parts for 8535AG-01LFT

8535AG-01LFT Summary of contents

Page 1

... Q1 nQ1 Q2 nQ2 Q3 4.4mm x 6.5mm x 0.92mm body package nQ3 V CC nQ3 CLK_EN 4mm x 4mm x 0.9mm body package 1 ICS8535- nQ0 CLK0 nQ1 15 CLK1 nQ2 nQ3 CC ICS8535-01 20-Lead TSSOP G Package Top View nQ2 ICS8535-01 20-Lead VFQFN K Package Top View ICS8535AG-01 REV. F OCTOBER 27, 2008 ...

Page 2

... ICS8535-01 LOW SKEW, 1-to-4 LVCMOS/LVTTL-TO-3.3V LVPECL FANOUT BUFFER ABLE IN ESCRIPTIONS ABLE IN HARACTERISTICS IDT ™ / ICS ™ 3.3V LVPECL FANOUT BUFFER ICS8535AG-01 REV. F OCTOBER 27, 2008 ...

Page 3

... LOW SKEW, 1-to-4 LVCMOS/LVTTL-TO-3.3V LVPECL FANOUT BUFFER T 3A ABLE ONTROL NPUT UNCTION Disabled CLK0, CLK1 CLK_EN nQ0:nQ3 Q0: ABLE LOCK NPUT UNCTION ABLE IDT ™ / ICS ™ 3.3V LVPECL FANOUT BUFFER ABLE CLK_EN T D IGURE IMING IAGRAM Enabled ICS8535AG-01 REV. F OCTOBER 27, 2008 ...

Page 4

... DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for ex- tended periods may affect product reliability 3.3V±5 0° 3.3V±5 0°C HARACTERISTICS 3.3V±5 0°C 70° 70° 70° ICS8535AG-01 REV. F OCTOBER 27, 2008 µ A µ A µ A µ ...

Page 5

... ICS8535-01 LOW SKEW, 1-to-4 LVCMOS/LVTTL-TO-3.3V LVPECL FANOUT BUFFER 3.3V±5%, T ABLE HARACTERISTICS IDT ™ / ICS ™ 3.3V LVPECL FANOUT BUFFER = 0°C 70° ƒ ICS8535AG-01 REV. F OCTOBER 27, 2008 ...

Page 6

... Input/Output Additive Phase Jitter 100k FFSET ROM ARRIER REQUENCY Z meets the noise floor of what is shown, but can actually be lower. The phase noise is dependant on the input source and measurement equipment 156.25MHz = 0.09ps (typical) 10M 100M ) ICS8535AG-01 REV. F OCTOBER 27, 2008 ...

Page 7

... LVPECL FANOUT BUFFER M I EASUREMENT NFORMATION SCOPE PART 1 nQx Qx Qx PART 2 nQy nQx ART TO ART Clock 20% Outputs UTPUT ISE nQ0:nQ3 Q0: UTPUT UTY 7 tsk(pp) S KEW 80% 80 ALL IME PERIOD t PW odc = x 100% t PERIOD YCLE ULSE IDTH ERIOD ICS8535AG-01 REV. F OCTOBER 27, 2008 20% ...

Page 8

... Other suitable clock layouts may exist and it would be recommended that the board design- ers simulate to guarantee compatibility across all printed circuit and clock component process variations. FIN FOUT RTT T ERMINATION 8 : UTPUT 3.3V 125 125 FIN 2B. LVPECL O T IGURE UTPUT ERMINATION ICS8535AG-01 REV. F OCTOBER 27, 2008 ...

Page 9

... For ICS8535-01, the unused clock outputs can be left floating. 3.3V R12 VEE CLK_EN nQ0 3 18 CLK_SEL VCC 4 17 CLK0 nQ1 6 15 CLK1 Q2 R11 nQ2 VCC 3. VCC nQ3 C1 0.1u ICS8535-01 3. 0.1u 0.1u 3. ICS8535-01 LVPECL B S UFFER 3.3V 3. CHEMATIC XAMPLE ICS8535AG-01 REV. F OCTOBER 27, 2008 ...

Page 10

... ORCED ONVECTION by Velocity (Linear Feet per Minute 114.5°C/W 73.2°C VFQFN EAD by Velocity (Meters per Second 60.4°C/W 10 must be used. Assuming a JA 200 500 98.0°C/W 88.0°C/W 66.6°C/W 63.5°C 52.8°C/W 46.0°C/W ICS8535AG-01 REV. F OCTOBER 27, 2008 ...

Page 11

... Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW IDT ™ / ICS ™ 3.3V LVPECL FANOUT BUFFER LVPECL D C IGURE RIVER IRCUIT AND – 0.9V CC_MAX – OH_MAX CC_MAX OH_MAX [( OL_MAX CC_MAX OL_MAX OUT ERMINATION load, and a termination ] * ( CC_MAX OH_MAX - CC_MAX OL_MAX ICS8535AG-01 REV. F OCTOBER 27, 2008 ...

Page 12

... R I ELIABILITY NFORMATION 20 L TSSOP EAD by Velocity (Linear Feet per Minute 114.5°C/W 73.2°C VFQFN EAD by Velocity (Meters per Second 60.4°C/W 12 200 500 98.0°C/W 88.0°C/W 66.6°C/W 63.5°C 52.8°C/W 46.0°C/W ICS8535AG-01 REV. F OCTOBER 27, 2008 ...

Page 13

... ICS8535-01 LOW SKEW, 1-to-4 LVCMOS/LVTTL-TO-3.3V LVPECL FANOUT BUFFER ACKAGE UTLINE UFFIX FOR IDT ™ / ICS ™ 3.3V LVPECL FANOUT BUFFER TSSOP EAD T 8A TSSOP ABLE ACKAGE IMENSIONS FOR ° JEDEC P 95, MO-153 EFERENCE OCUMENT UBLICATION ° ICS8535AG-01 REV. F OCTOBER 27, 2008 ...

Page 14

... ICS8535-01 LOW SKEW, 1-to-4 LVCMOS/LVTTL-TO-3.3V LVPECL FANOUT BUFFER ACKAGE UTLINE UFFIX FOR IDT ™ / ICS ™ 3.3V LVPECL FANOUT BUFFER VFQFN EAD T 8B ABLE ACKAGE IMENSIONS FOR Reference Document: JEDEC Publication 95, MO-220 VFQFN EAD ICS8535AG-01 REV. F OCTOBER 27, 2008 ...

Page 15

... ICS ™ 3.3V LVPECL FANOUT BUFFER " " " " " " " " " " ° & ° ° & ° ° & ° ° & ° ICS8535AG-01 REV. F OCTOBER 27, 2008 ° ° ° ° ° ° ° ° ...

Page 16

... LOW SKEW, 1-to-4 LVCMOS/LVTTL-TO-3.3V LVPECL FANOUT BUFFER " " IDT ™ / ICS ™ 3.3V LVPECL FANOUT BUFFER ± " " ± " " " " " " " " " " " " " " " " ICS8535AG-01 REV. F OCTOBER 27, 2008 ...

Page 17

ICS8535-01 LOW SKEW, 1-to-4 LVCMOS/LVTTL-TO-3.3V LVPECL FANOUT BUFFER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United ...

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