8531AY-01LF IDT, Integrated Device Technology Inc, 8531AY-01LF Datasheet - Page 11

8531AY-01LF

Manufacturer Part Number
8531AY-01LF
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Driverr
Datasheet

Specifications of 8531AY-01LF

Number Of Clock Inputs
2
Mode Of Operation
Differential
Output Frequency
500MHz
Output Logic Level
LVPECL
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Package Type
TQFP
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
32
Lead Free Status / RoHS Status
Compliant
T
The clock layout topology shown below is a typical termina-
tion for LVPECL outputs. The two different layouts mentioned
are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, ter-
minating resistors (DC current path to ground) or current
sources must be used for functionality. These outputs are
designed to drive 50Ω transmission lines. Matched imped-
IDT
ERMINATION FOR
ICS8531-01
LOW SKEW, 1-TO-9, DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER
RTT =
/ ICS
((V
F
1-TO-9, 3.3V LVPECL FANOUT BUFFER
FOUT
OH
IGURE
+ V
OL
5A. LVPECL O
) / (V
LVPECL O
1
CC
Z
Z
– 2)) – 2
o
o
= 50Ω
= 50Ω
Z
UTPUTS
o
50Ω
UTPUT
T
RTT
ERMINATION
50Ω
V
CC
FIN
- 2V
11
ance techniques should be used to maximize operating fre-
quency and minimize signal distortion. Figures 5A and 5B
show two different layouts which are recommended only as
guidelines. Other suitable clock layouts may exist and it
would be recommended that the board designers simulate
to guarantee compatibility across all printed circuit and clock
component process variations.
FOUT
F
IGURE
5B. LVPECL O
Z
Z
o
o
= 50Ω
= 50Ω
ICS8531AY-01 REV. F APRIL 11, 2007
125Ω
84Ω
UTPUT
3.3V
125Ω
84Ω
T
ERMINATION
FIN

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