5T93GL10NLI IDT, Integrated Device Technology Inc, 5T93GL10NLI Datasheet - Page 8

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5T93GL10NLI

Manufacturer Part Number
5T93GL10NLI
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Driverr
Datasheet

Specifications of 5T93GL10NLI

Number Of Clock Inputs
2
Mode Of Operation
Differential
Output Frequency
650MHz
Output Logic Level
LVDS
Operating Supply Voltage (min)
2.3V
Operating Supply Voltage (typ)
2.5V
Operating Supply Voltage (max)
2.7V
Package Type
VFQFPN
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
40
Quiescent Current
295mA
Lead Free Status / RoHS Status
Not Compliant
Table 5E. AC Differential Input Characteristics
NOTE 1.The output will not change state until the inputs have crossed and the minimum differential voltage range defined by V
been met or exceeded.
NOTE 2.V
“complement” input level. The AC differential voltage must be achieved to guarantee switching to a new state.
NOTE 3.IV
Table 5F. AC Characteristics
NOTE 1. AC propagation measurements should not be taken within the first 100 cycles of startup.
NOTE 2. Skew measured between crosspoints of all differential output pairs under identical input and output interfaces, transitions and
load conditions on any one device.
NOTE 3. Skew measured is the difference between propagation delay times tp
identical input and output interfaces, transitions and load conditions on any one device.
NOTE 4. Skew measured is the magnitude of the difference in propagation times between any single differential output pair of two
devices, given identical transitions and load conditions at identical V
NOTE 5. All parameters are tested with a 50% input duty cycle.
NOTE 6. Guaranteed by design but not production tested.
IDT™ LVDS GLITCHLESS CLOCK BUFFER TERABUFFER™ II
Symbol
V
V
V
V
Symbol
tsk(o)
tsk(p)
tsk(pp)
tp
tp
fo
t
t
t
t
PGE
PGD
PWRDN
PWRUP
IDT5T93GL10
06 GLITCHLESS CLOCK BUFFER TERABUFFER™ II
DIF
IX
CM
IN
LH
HL
DIF
CM
Parameter
AC Differential Voltage
Differential Input Crosspoint Voltage
Common Mode Input Voltage Range
Input Voltage
Parameter
Same Device Output Pin-to-Pin Skew
Pulse Skew
Part-to-Part Skew
Propagation Delay, Low-to-High
Propagation Delay, High-to-Low
Frequency Range
Output Gate Enable Crossing
V
Output Gate Disable Crossing
V
GL Designated Level
PD Crossing V
Output Gate Disable Crossing V
Qn/Qn Driven to GL Designated Level
specifies the minimum input voltage (V
specified the maximum allowable range of (V
THI
THI
-to-Qn/Qn Crosspoint
-to-Qn/Qn Crosspoint Driven to
(3)
THI
-to-Qn = V
(4)
(6)
(1,5)
(2)
, T
A
DD
= -40°C to 85°C
, Qn = V
THI
to
(3)
(2)
DD
TR
(1)
– V
, T
A/A Crosspoint to Qn/Qn
CP
TR
A
) required for switching where V
Test Conditions
= -40°C to 85°C
+ V
Crosspoint
CP
DD
8
) /2.
levels and temperature.
Minimum
HL
0.05
0.05
-0.3
0.1
and tp
Minimum
LH
of any single differential output pair under
TR
Typical
is the “true” input level and V
Typical
IDT5T93GL10 REV. A MARCH 18, 2009
1.5
1.5
Maximum
Maximum
+3.6
V
V
3.6
DD
DD
100
300
650
100
100
3.5
3.5
25
2
2
CP
DIF
Units
is the
Units
MHz
V
V
V
V
µS
µS
ps
ps
ps
ns
ns
ns
ns
has

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