ICS8344BYIT IDT, Integrated Device Technology Inc, ICS8344BYIT Datasheet

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ICS8344BYIT

Manufacturer Part Number
ICS8344BYIT
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Driverr
Datasheet

Specifications of ICS8344BYIT

Number Of Clock Inputs
2
Mode Of Operation
Differential
Output Frequency
100MHz
Output Logic Level
LVCMOS/LVTTL
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.465V
Package Type
LQFP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Quiescent Current
95mA
Lead Free Status / RoHS Status
Compliant
LOW SKEW, 1-TO-24 DIFFERENTIAL-
TO-LVCMOS/LVTTL FANOUT BUFFER
B
IDT
G
accept most standard differential input levels. The ICS8344I
is designed to translate any differential signal levels to
LVCMOS/LVTTL levels. The low impedance LVCMOS/LVTTL
outputs are designed to drive 50Ω series or parallel termi-
nated transmission lines. The effective fanout can be in-
creased to 48 by utilizing the ability of the outputs to drive
two series terminated lines. Redundant clock applications
can make use of the dual clock input. The dual clock inputs
also facilitate board level testing. ICS8344I is character-
ized at full 3.3V, full 2.5V and mixed 3.3V input and 2.5V
output operating supply modes.
Guaranteed output and part-to-part skew characteristics make
the ICS8344I ideal for those clock distribution applications de-
manding well defined performance and repeatability.
CLK_SEL
HiPerClockS™
IC S
LOCK
nCLK0
nCLK1
ENERAL
CLK0
CLK1
OE1
OE2
OE3
/ ICS
LVCMOS/LVTTL FANOUT BUFFER
D
The ICS8344I is a low voltage, low skew fanout
buffer and a member of the HiPerClockS™ fam-
ily of High Performance Clock Solutions from IDT.
The ICS8344I has two selectable clock inputs.
The CLK0, nCLK0 and CLK1, nCLK1 pairs can
IAGRAM
D
ESCRIPTION
0
1
Q0:Q7
Q8:Q15
Q16:Q23
1
F
• Twenty-four LVCMOS/LVTTL outputs,
• Two selectable differential clock input pairs for redundant
• CLKx, nCLKx pair can accept the following differential
• Maximum output frequency: 100MHz
• Translates any single-ended input signal to LVCMOS/LVTTL
• Multiple output enable pins for disabling unused outputs
• Output skew: 275ps (maximum)
• Part-to-part skew: 600ps (maximum)
• Bank skew: 150ps (maximum)
• Supply modes:
• -40°C to 85°C ambient operating temperature
• Available in both standard (RoHS 5) and lead-free (RoHS 6)
7Ω typical output impedance
clock applications
input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
with resistor bias on nCLK input
in reduced fanout applications
Core/Output
3.3V/3.3V
3.3V/2.5V
2.5V/2.5V
packages
EATURES
P
GND
GND
V
V
Q16
Q17
Q18
Q19
Q20
Q21
Q22
Q23
IN
DDO
DDO
A
1
2
3
4
5
6
7
8
9
10
11
12
SSIGNMENT
48 47 46 45 44 43 42 41 40 39 38 37
13 14 15 16 17 18 19 20 21 22 23 24
7mm x 7mm x 1.4mm
48-Lead LQFP
ICS8344I
package body
Y Package
Top View
ICS8344BYI REV. B February 20, 2009
36
35
34
33
32
31
30
29
28
27
26
25
ICS8344I
Q7
Q6
V
GND
Q5
Q4
Q3
Q2
V
GND
Q1
Q0
DDO
DDO

Related parts for ICS8344BYIT

ICS8344BYIT Summary of contents

Page 1

LOW SKEW, 1-TO-24 DIFFERENTIAL- TO-LVCMOS/LVTTL FANOUT BUFFER G D ENERAL ESCRIPTION The ICS8344I is a low voltage, low skew fanout IC S buffer and a member of the HiPerClockS™ fam- HiPerClockS™ ily of High Performance Clock Solutions from IDT. The ...

Page 2

ICS8344I LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER ABLE IN ESCRIPTIONS ...

Page 3

ICS8344I LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER T 3A ABLE UTPUT NABLE UNCTION ...

Page 4

ICS8344I LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER BSOLUTE AXIMUM ATINGS Supply Voltage Inputs, V -0. Outputs, V -0. Package Thermal Impedance, θ JA Storage Temperature, T -65°C to 150°C ...

Page 5

ICS8344I LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER T 4D. LVCMOS DC C ABLE HARACTERISTICS ...

Page 6

ICS8344I LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER T 4G ABLE IFFERENTIAL HARACTERISTICS ...

Page 7

ICS8344I LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER T 5B 3.3V±5%, V ABLE HARACTERISTICS ...

Page 8

ICS8344I LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER P ARAMETER 1.65V± DDO LVCMOS GND -1.65V±5% 3. UTPUT OAD EST IRCUIT 1.25V± DDO LVCMOS GND -1.25V±5% 2. ...

Page 9

ICS8344I LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER nCLK0, nCLK1 CLK0, CLK1 Q0:Q23 ROPAGATION ELAY 70% 30% Clock t Outputs UTPUT ISE ALL IME IDT ™ / ICS ™ LVCMOS/LVTTL FANOUT BUFFER ...

Page 10

ICS8344I LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER IRING THE IFFERENTIAL NPUT TO Figure 1 shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF = V generated by the bias ...

Page 11

ICS8344I LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER IFFERENTIAL LOCK NPUT NTERFACE The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL and other differential signals. Both signals must meet the V V input requirements. Figures 2A to ...

Page 12

ICS8344I LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER θ ABLE VS IR LOW ABLE FOR JA Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered ...

Page 13

ICS8344I LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER ACKAGE UTLINE UFFIX FOR T ABLE S Y Reference Document: JEDEC Publication 95, MS-026 IDT ™ / ICS ™ LVCMOS/LVTTL FANOUT BUFFER LQFP EAD 7. P ...

Page 14

ICS8344I LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER ABLE RDERING NFORMATION ...

Page 15

ICS8344I LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER ...

Page 16

ICS8344I LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States ...

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