ICS8701CYIT IDT, Integrated Device Technology Inc, ICS8701CYIT Datasheet
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ICS8701CYIT
Specifications of ICS8701CYIT
Related parts for ICS8701CYIT
ICS8701CYIT Summary of contents
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G D ENERAL ESCRIPTION The ICS8701I is a low skew, ÷1, ÷2 Clock Generator. The low impedance LVCMOS outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased from ...
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ABLE IN ESCRIPTIONS ...
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ABLE IN HARACTERISTICS ...
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BSOLUTE AXIMUM ATINGS Supply Voltage Inputs Outputs Package Thermal Impedance, θ JA Storage Temperature, T STG T 4A ABLE OWER UPPLY HARACTERISTICS ...
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T 4B. LVCMOS DC C ABLE HARACTERISTICS ...
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T 5A ABLE HARACTERISTICS ...
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T 5B ABLE HARACTERISTICS ...
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P ARAMETER 1.65V± DDO LVCMOS GND -1.165V±5% 3.3V C /3. ORE UTPUT OAD EST V DDO DDO sk( UTPUT KEW V DDO ...
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Driver Termination For LVCMOS Output Termination, please refer to a separate Application Note: LVCMOS Driver Termination ECOMMENDATIONS FOR NUSED I : NPUTS LVCMOS ONTROL INS All control pins have internal pull-ups or pull-downs; additional resistance ...
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ABLE VS IR LOW ABLE FOR JA θ θ θ θ θ Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered ...
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ACKAGE UTLINE UFFIX FOR ABLE θ θ θ θ θ Reference ...
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ABLE RDERING NFORMATION ...
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We’ve Got Your Timing Solution. 6024 Silver Creek Valley Road San Jose, CA 95138 © 2010 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, the IDT logo, ICS and HiPerClockS are trademarks of ...