ICS87021AMIT IDT, Integrated Device Technology Inc, ICS87021AMIT Datasheet - Page 6

• Manufacturer Part Number: ICS87021AMIT
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Dividerr

Specifications of ICS87021AMIT

• Number Of Clock Inputs: 1
• Mode Of Operation: Differential
• Output Frequency: 250MHz
• Output Logic Level: LVCMOS/LVTTL
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: SOIC N
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Not Compliant

IDT
The spectral purity in a band at a specific offset from the
fundamental compared to the power of the fundamental is called
the dBc Phase Noise. This value is normally expressed using a
Phase noise plot and is most often the specified plot in many
applications. Phase noise is defined as the ratio of the noise power
present in a 1Hz band at a specified offset from the fundamental
frequency to the power value of the fundamental. This ratio is
expressed in decibels (dBm) or a ratio of the power in the 1Hz
ICS87021I
÷1/÷2 DIFFERENTIAL-TO-LVCMOS/LVTTL CLOCK GENERATOR
™
/ ICS
™
LVCMOS CLOCK GENERATOR
O
A
FFSET
DDITIVE
F
ROM
P
C
HASE
6
ARRIER
band to the power in the fundamental. When the required offset
is specified, the phase noise is called a dBc value, which simply
means dBm at a specified offset from the fundamental. By
investigating jitter in the frequency domain, we get a better
understanding of its effects on the desired application over the
entire time record of the signal. It is mathematically possible to
calculate an expected bit error rate given a phase noise plot.
J
F
REQUENCY
ITTER
(H
Additive Phase Jitter
(12kHz to 20MHz) = 0.18ps typical
Z
)
ICS87021AMI REV. B AUGUST 26, 2008
@ 250MHz