HS1-82C54RH-8 Intersil, HS1-82C54RH-8 Datasheet - Page 8

• Manufacturer Part Number: HS1-82C54RH-8
• Manufacturer: Intersil

Specifications of HS1-82C54RH-8

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Since the Control Word Register and the three Counter
shave separate addresses (selected by the A1, A0 inputs),
Control Word Format
A1, A0 = 11; CS = 0; RD = 1; WR = 0
NOTE: In all four examples, all counters are programmed to Read/Write two-byte counts. These are only four of many possible programming
sequences.
SC - SELECT COUNTER:
RW - READ/WRITE
Control Word - Counter 0
LSB of count - Counter 0
MSB of count - Counter 0
Control Word - Counter 1
LSB of count - Counter 1
MSB of count - Counter 1
Control Word - Counter 2
LSB of count - Counter 2
MSB of count - Counter 2
Control Word - Counter 0
Control Word - Counter 1
Control Word - Counter 2
LSB of count - Counter 2
LSB of count - Counter 1
LSB of count - Counter 0
MSB of count - Counter 0
MSB of count - Counter 1
MSB of count - Counter 2
RW1
SC1
significant byte only, or least significant byte and then
most significant byte).
0
0
1
1
0
0
1
1
RW0
SC0
0
1
0
1
0
1
0
1
Select Counter 0
Select Counter 1
Select Counter 2
Read-Back Command (See Read
Operations)
Counter Latch Command (See Read
Operations)
Read/Write least significant byte only.
Read/Write most significant byte only.
Read/Write least significant byte first, then
most significant byte.
SC1
D7
8
SC2
D6
FIGURE 10. A FEW POSSIBLE PROGRAMMING SEQUENCES
A1
A1
1
0
0
1
0
0
1
1
1
1
1
1
1
0
0
0
0
1
RW1
D5
FIGURE 9. CONTROL WORD FORMAT
A0
A0
1
0
0
1
1
1
1
0
0
1
1
1
0
1
0
0
1
0
HS-82C54RH
RW0
D4
and each Control Word specifies the Counter it applies to
(SC0, SC1 bits), no special instruction sequence is required.
Any programming sequence that follows the conventions
above is acceptable.
NOTE: Don’t Care bits (X) should be 0 to insure compatibility with
future products.
M2
D3
M - MODE:
BCD - BINARY CODED DECIMAL:
Control Word - Counter 2
Control Word - Counter 1
Control Word - Counter 0
LSB of count - Counter 2
MSB of count - Counter 2
LSB of count - Counter 1
MSB of count - Counter 1
LSB of count - Counter 0
MSB of count - Counter 0
Control Word - Counter 1
Control Word - Counter 0
LSB of count - Counter 1
Control Word - Counter 2
LSB of count - Counter 0
MSB of count - Counter 1
LSB of count - Counter 2
MSB of count - Counter 0
MSB of count - Counter 2
M2
X
X
0
0
1
1
0
1
M1
D2
Binary Counter 16-bits
Binary Coded Decimal (BCD) Counter (4 Decades)
M1
0
0
1
1
0
0
M0
D1
M0
0
1
0
1
0
1
BCD
D0
Mode 0
Mode 1
Mode 2
Mode 3
Mode 4
Mode 5
A1
A1
1
1
1
1
1
0
0
0
0
1
1
0
1
0
0
1
0
1
A0
A0
1
1
1
0
0
1
1
0
0
1
1
1
1
0
1
0
0
0