LT1739IUE#PBF Linear Technology, LT1739IUE#PBF Datasheet - Page 8

• Manufacturer Part Number: LT1739IUE#PBF
• Manufacturer: Linear Technology

Specifications of LT1739IUE#PBF

• Power Supply Requirement: Dual
• Slew Rate: 200V/us
• Pin Count: 12
• Lead Free Status / RoHS Status: Compliant

APPLICATIO S I FOR ATIO
LT1739
Logic Controlled Operating Current
The DSP controller in a typical xDSL application can have
I/O pins assigned to provide logic control of the LT1739
line driver operating current. As shown in Figure 4 one or
two logic control inputs can set two or four different
operating modes. The logic inputs add or subtract current
to the SHDN input to set the operating current. The one
logic input example selects the supply current to be either
full power, 10mA per amplifier or just 2mA per amplifier,
which significantly reduces the driver power consumption
while maintaining less than 2
frequencies less than 1MHz. This low power mode retains
termination impedance at the amplifier outputs and the
line driving back termination resistors. With this termina-
tion, while a DSL port is not transmitting data, it can still
sense a received signal from the line across the back-
termination resistors and respond accordingly.
The two logic input control provides two intermediate
(approximately 7mA per amplifier and 5mA per amplifier)
operating levels between full power and termination
modes. For proper operation of the current control cir-
cuitry, it is necessary that the SHDNREF pin be biased at
least 2V more positive than V
tions where V
the DC bias of the SHDNREF pin is required. Contact
8
Two Control Inputs
One Control Input
V
Figure 4. Providing Logic Input Control of Operating Current
H
H
L
L
C1
V
R
V
R
LOGIC
R
LOGIC
SHDN
R
V
SHDN
R
V
H
H
H
CO
C0
L
L
L
C1
C
C
RESISTOR VALUES (k )
R
RESISTOR VALUES (k )
R
SUPPLY CURRENT PER AMPLIFIER (mA)
SUPPLY CURRENT PER AMPLIFIER (mA)
40.2
11.5
19.1
40.2
7.32
SHDN
3V
SHDN
3V
10
10
7
5
2
2
–
TO V
TO V
is at ground potential, special attention to
3.3V
3.3V
43.2
13.0
22.1
43.2
8.25
10
10
7
5
2
2
CC
CC
(12V)
(12V)
U
60.4
21.5
36.5
60.4
13.7
5V
5V
10
10
7
5
2
2
4.99
8.66
14.3
4.99
5.49
R
R
3V
3V
10
10
7
5
2
2
SHDN
SHDN
U
3.3V
3.3V
6.81
10.7
17.8
6.81
6.65
TO V
TO V
10
10
7
5
2
2
–
LOGIC
LOGIC
. In single supply applica-
19.6
20.5
34.0
19.6
12.7
5V
5V
1739 F04
10
10
7
5
2
2
W
output impedance to
0V
0V
V
V
LOGIC
LOGIC
V
V
V
C1
C0
C
R
R
R
C1
C0
C
12V OR V
12V OR V
U
R
2k
R
2k
LOGIC
LOGIC
SHDN
SHDNREF
SHDN
SHDNREF
SHDN
SHDN
Linear Technology for assistance in implementing a single
supply design with operating current control. These
modes can be useful for overall system power manage-
ment when full power transmissions are not necessary.
Shutdown and Recovery
The ultimate power saving action on a completely idle port
is to fully shut down the line driver by pulling the SHDN pin
to within 0.4V of the SHDNREF potential. As shown in
Figure 5 complete shutdown occurs in less than 10 s and,
more importantly, complete recovery from the shut down
state to full operation occurs in less than 2 s. The biasing
circuitry in the LT1739 reacts very quickly to bring the
amplifiers back to normal operation.
Power Dissipation and Heat Management
xDSL applications require the line driver to dissipate a
significant amount of power and heat compared to other
components in the system. The large peak to RMS varia-
tions of DMT and CAP ADSL signals require high supply
voltages to prevent clipping, and the use of a step-up
transformer to couple the signal to the telephone line can
require high peak current levels. These requirements
result in the driver package having to dissipate significant
amounts of power. Several multiport cards inserted into
a rack in an enclosed central office box can add up to
many, many watts of power dissipation in an elevated
ambient temperature environment. The LT1739 has built-
in thermal shutdown circuitry that will protect the ampli-
fiers if operated at excessive temperatures, however data
transmissions will be seriously impaired. It is important in
SHDNREF = 0V
AMPLIFIER
OUTPUT
V
SHDN
Figure 5. Shutdown and Recovery Timing
1794 F05
1739fas, sn1739