MC33389CDW Freescale, MC33389CDW Datasheet - Page 32

• Manufacturer Part Number: MC33389CDW
• Manufacturer: Freescale

Specifications of MC33389CDW

• Number Of Transceivers: 1
• Power Down Mode: Sleep/Standby
• Operating Supply Voltage (max): 27V
• Operating Supply Voltage (typ): 9/12/15/18/24V
• Operating Supply Voltage (min): 5.5V
• Package Type: SOIC W
• Supply Current: 7mA
• Operating Temperature (max): 125C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 28
• Lead Free Status / RoHS Status: Not Compliant

Request mode, Normal mode, and Stand-by mode. In all
other modes (Sleep mode, Emergency mode), the voltage
supply for the microcontroller in permanently switched OFF
and the SBC input logic for MISO, MOSI, CS and SCLK isn’t
working (except SPI wake-up function in the Sleep mode).
Writing Data
transmissions to be performed. The first byte contains the
address of the register (MSB first) and the read/write bits
must be set to one. The second byte contains the new data
addressed by the previous byte (MSB first) and the parity
data information from a previous transmission. This data
contains no useful information (e.g. status). It shouldn’t be used.
interrupt will be issued and the SBC retains the old state.
Reading Data
transmissions have to be performed. The first byte contains
the address of the register (MSB first) and the read/write flags
32
33389
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
The SBC is accessible via the SPI interface in the Normal
To write data in a SPI register there are two, one-byte
The SBC sends back the old address, R/W, parity, and
In case of a wrong address field or parity mismatch, an
To read data from a dedicated register two, one-byte
HC08/12 SPI Data Register
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
A5 A4
P3 P2 P1 P0
new address + R/W (1st byte)
A3 A2 A1 A0 1
new data + parity (2nd byte)
D3 D2 D1 D0
MISO
Bit15
A5 A4 A3 A2 A1 A0
1
Bit14 Bit13 Bit12 Bit11 Bit10 Bit9
Figure 18. Microcontroller SPI Writing Data
address + R/W
Figure 17. SPI Communication Format
SBC SPI Data Register
Bit15
A5 A4 A3 A2 A1 A0
RW
Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
RW
old address + R/W
Bit8
information. The calculation of the parity field P3-P0 has to
follow the equations:
remains 0. Please see
setting to zero. The second byte needn’t contain valid data,
nevertheless, the parity calculation has to performed to avoid
an interrupt caused by a parity mismatch.
address and R/W bits and the new data addressed by the first
transmitted byte starting with P3 after the last valid read/write
bit has been received.
remains zero.
P3 P2 P1 P0
Bit7
Note: During the transmission of the two bytes the CS pin
During a read operation the SBC sends back the old
Note: During the transmission of the two bytes the CS pin
Bit6
parity
Bit5
RW
Bit4
P3 = D3 ⊕ D0
P2 = D3 ⊕ D2
P1 = D2 ⊕ D1
P0 = D1 ⊕ D0
RW
D3 D2 D1 D0
Bit3
P3 P2 P1 P0
Bit2
Analog Integrated Circuit Device Data
Figure 18
data
old parity
Bit1
Bit0
Freescale Semiconductor
MOSI
(EX - OR)
D3 D2 D1 D0
old data