KS8995E Micrel Inc, KS8995E Datasheet - Page 21

• Manufacturer Part Number: KS8995E
• Manufacturer: Micrel Inc

Specifications of KS8995E

• Number Of Primary Switch Ports: 5
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII/SNI
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Not Compliant

MII Interface Operation
The MII (Media Independent Interface) is specified by the IEEE 802.3 committee and provides a common interface between
physical layer and MAC layer devices. The KS8995E MII behaves like a physical layer device. There are two distinct groups,
one being for transmission and the other for receiving. The table below describes the signals used in this interface.
This interface is a nibble wide data interface and therefore runs at 1/4 the network bit rate (not encoded). Additional signals
on the transmit side indicate when data is valid or when an error occurs during transmission. Likewise, the receive side has
indicators that convey when the data is valid and without physical layer errors.
For half-duplex operation there is a signal that indicate a collision has occurred during transmission.
Note that the signal MRXER is not provided on the MII interface for the KS8995E. Normally this would indicate a receive error
coming from the physical layer device, but since this port connects to a MAC device it is not appropriate. If the connecting device
has a MRXER pin, this should be tied low on the other device.
August 2003
KS8995E
MII Signal
MTXEN
MTXER
MTXD3
MTXD2
MTXD1
MTXD0
MTXC
MCOL
MCRS
MRXDV
MRXER
MRXD3
MRXD2
MRXD1
MRXD0
MRXC
Description
Transmit enable
Transmit error
Transmit data bit 3
Transmit data bit 2
Transmit data bit 1
Transmit data bit 0
Transmit clock
Collision detection
Carrier sense
Receive data valid
Receive error
Receive data bit 3
Receive data bit 2
Receive data bit 1
Receive data bit 0
Receive clock
Table 1. MII Signals
KS8995E Signal
MTXEN
MTXER
MTXD[3]
MTXD[2]
MTXD[1]
MTXD[0]
MII_CLK
MCOL
MRXDV
MRXDV
Not used
MRXD[3]
MRXD[2]
MRXD[1]
MRXD[0]
MII_CLK
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KS8995E
Micrel