82V2081PPG8 IDT, Integrated Device Technology Inc, 82V2081PPG8 Datasheet - Page 13

82V2081PPG8

Manufacturer Part Number
82V2081PPG8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 82V2081PPG8

Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Package Type
TQFP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Compliant
SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT
Table-1 Pin Description (Continued)
PULS1
PULS0
PATT1
PATT0
Name
AD5
AD4
AD3
AD2
RPD
AD1
AD0
RST
JA1
JA0
EQ
Type
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
Pin No.
31
30
29
28
27
26
15
14
12
AD5: Address/Data Bus bit5
In Intel/Motorola multiplexed interface mode, this signal is the multiplexed bi-directional address/data bus of the microcontroller
interface.
In serial microcontroller interface mode, this pin should be connected to ground through a 10 kΩ resistor.
See above.
AD4: Address/Data Bus bit4
In Intel/Motorola multiplexed interface mode, this signal is the multiplexed bi-directional address/data bus of the microcontroller
interface.
In serial microcontroller interface mode, this pin should be connected to ground through a 10 kΩ resistor.
See above.
AD3: Address/Data Bus bit3
In Intel/Motorola multiplexed interface mode, this signal is the multiplexed bi-directional address/data bus of the microcontroller
interface.
In serial microcontroller interface mode, this pin should be connected to ground through a 10 kΩ resistor.
EQ: Receive Equalizer on/off control in hardware control mode
AD2: Address/Data Bus bit2
In Intel/Motorola multiplexed interface mode, this signal is the multiplexed bi-directional address/data bus of the microcontroller
interface.
In serial microcontroller interface mode, this pin should be connected to ground through a 10 kΩ resistor.
RPD: Receiver power down control in hardware control mode
AD1: Address/Data Bus bit1
In Intel/Motorola multiplexed interface mode, this signal is the multiplexed bi-directional address/data bus of the microcontroller
interface.
In serial microcontroller interface mode, this pin should be connected to ground through a 10 kΩ resistor.
PATT[1:0]: Transmit pattern select
In hardware control mode, this pin selects the transmit pattern
AD0: Address/Data Bus bit0
In Intel/Motorola multiplexed interface mode, this signal is the multiplexed bi-directional address/data bus of the microcontroller
interface.
In serial microcontroller interface mode, this pin should be connected to ground through a 10 kΩ resistor.
See above.
JA[1:0]: Jitter attenuation position, bandwidth and the depth of FIFO select (only used for hardware control mode)
In software control mode, this pin should be connected to ground.
See above.
RST: Hardware reset
The chip is forced to reset state if a low signal is input on this pin for more than 100ns.
0= short haul (10 dB)
1= long haul (36 dB for T1/J1, 43 dB for E1)
0= normal operation
1= receiver power down
00 = normal
01= All Ones
10= PRBS
11= transmitter power down
00 = JA is disabled
01 = JA in receiver, broad bandwidth, FIFO=64 bits
10 = JA in receiver, narrow bandwidth, FIFO=128 bits
11 = JA in transmitter, narrow bandwidth, FIFO=128 bits
13
Description
TEMPERATURE RANGES
INDUSTRIAL

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