LU82551QM Intel, LU82551QM Datasheet - Page 35
LU82551QM
Manufacturer Part Number
LU82551QM
Description
Manufacturer
Intel
Datasheet
1.LU82551QM.pdf
(120 pages)
Specifications of LU82551QM
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Lead Free Status / RoHS Status
Compliant
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Part Number:
LU82551QM
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Datasheet
Figure 9. Initialization upon RST# and ISOLATE#
Note: The PCI Specification, Revision 2.2, states that the RST# signal should be active low in the B3
If PME is enabled (in the PCI power management registers), the RST# signal does not affect any
PME related circuits (in other words, the CSTSCHG registers (CardBus only), PCI power
management registers, and the wake-up packet would not be affected).
state. (In PCI Specification, Revision 2.1, the RST# signal is undefined during the B3 state.)
The transition from the B3 bus power state to the B0 bus power state occurs on the trailing edge of
the RST# signal.
The initialization signal is generated internally in the following cases:
The internal initialization signal resets the PCI Configuration Space, MAC configuration, and
memory structure.
The behavior of the RST# and ISOLATE# pins and the internal 82551QM initialization signal are
shown in the following figure.
•
•
•
Active RST# signal while the 82551QM is the D0, D1, or D2 power state
RST# trailing edge while the 82551QM is in the D3 power state
ISOLATE# trailing edge
RST#
Internal hardware
reset
RST#
Internal hardware
reset
ISOLATE#
Internal hardware
reset
D0 - D2 power state
Internal reset
due to ISOLATE#
D3 power state
Networking Silicon — 82551QM
640 ns
640 ns
29
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