LU82562GZ Intel, LU82562GZ Datasheet - Page 10

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LU82562GZ

Manufacturer Part Number
LU82562GZ
Description
Manufacturer
Intel
Datasheet

Specifications of LU82562GZ

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.45V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Lead Free Status / RoHS Status
Compliant

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Manufacturer
Quantity
Price
Part Number:
LU82562GZ
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PIONEER
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Part Number:
LU82562GZ
Manufacturer:
INTEL
Quantity:
20 000
82562GZ — Networking Silicon
2.1.1
2.1.2
4
Figure 2. 82562GZ PLC 10/100 Mbps Ethernet Solution
Reset/Synchronize Operations
The Reset/Synchronize signal used by the LAN Connect Interface is driven by the ICHx integrated
LAN device. It has two functions:
Reset Considerations
When the 82562GZ Reset signal (JRSTSYNC) is asserted for at least 500 µs, all internal circuits
are reset. The 82562GZ can also be reset by setting the MII register Reset bit equal to 1 (Register 0,
bit 15).
The 82562GZ filters out JRSTSYNC pulses with a width of less than 200 ns to distinguish between
a reset and synchronize pulse. Again, the Reset signal should be longer than 500 µs to reset the
82562GZ.
Synchronize. When this pin is activated synchronously for only one LAN connect clock, it is
used for synchronization between the ICHx integrated LAN and PHY on LAN connect word
boundaries.
Reset. When this pin is asserted beyond one LAN connect clock, the 82562GZ uses this signal
as a reset signal. To ensure a reset of the 82562GZ, the reset should remain active for at least
500 µs.
System Bus Interface
I/O Control Hub
I/O Control Hub 4
LAN Controller
(ICH4) LAN
Controller
(Platform LAN
82562GZ
82562EZ
Connect
Device)
PLC
Magnetics
Transmit Differential Pair
(TDP/TDN)
Receive Differential Pair
(RDP/RDN)
Datasheet

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