WBLXT9785HE.D0-865114 Cortina Systems Inc, WBLXT9785HE.D0-865114 Datasheet - Page 48
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WBLXT9785HE.D0-865114
Manufacturer Part Number
WBLXT9785HE.D0-865114
Description
Manufacturer
Cortina Systems Inc
Datasheet
1.WBLXT9785HE.D0-865114.pdf
(221 pages)
Specifications of WBLXT9785HE.D0-865114
Lead Free Status / RoHS Status
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LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
Table 14
Table 15
Cortina Systems
LED Signal Descriptions – PQFP (Sheet 2 of 2)
Power Supply Signal Descriptions – PQFP (Sheet 1 of 2)
®
1. Type Column Coding: I = Input, O = Output, OD = Open Drain output, ST = Schmitt Triggered input, TS =
2. The IP/ID resistors are disabled during H/W Power-Down mode. If a pin is an output or an I/O, the IP/ID
3. The LED outputs are three-stated in H/W Power-Down mode and during H/W reset.
1. Type Column Coding: I = Input, O = Output, OD = Open Drain output, ST = Schmitt Triggered input, TS =
65, 78, 184,
18, 29, 47,
131, 144,
103, 116,
117, 130,
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
PQFP
145, 158
Pin/Ball Designation
56, 208
98, 164
185
186
187
189
190
191
192
193
194
PQFP
Designation
Three-State-able output, SL = Slew-rate Limited output, IP = weak Internal Pull-up, ID = weak Internal pull-
Down.
resistors are also disabled when the output is enabled.
Three-State-able output, SL = Slew-rate Limited output, IP = weak Internal Pull-up, ID = weak Internal pull-
Down.
196
Pin/Ball
PBGA
H15,
H16,
G15,
F17,
J15,
J16,
H17
G17
F16
G13, J14,
P11, P12
C1, C11,
N13, P4,
P9, P10,
L13, L5
A2, A8,
P7, P8,
PBGA
F5, J5
D14
LED5_1_L
LED5_2_L
LED5_3_L
LED6_1_L
LED6_2_L
LED6_3_L
LED7_1_L
LED7_2_L
LED7_3_L
Symbol
VCCPECL
Symbol
VCCIO
VCCD
VCCR
OD, TS, SL,
OD, TS, SL,
OD, TS, SL,
Type
Type
IP
IP
IP
-
-
-
-
1
Signal Description
Digital Power Supply - Core.
+2.5 V supply for core digital circuits.
Digital Power Supply - I/O Ring.
+2.5/3.3 V supply for digital I/O circuits. The digital
input circuits running off of this rail, having a TTL-level
threshold and over-voltage protection, may be
interfaced with 3.3/5.0 V, when the IO supply is 3.3 V,
and 2.5/3.3/5.0 V when 2.5 V.
Digital Power Supply - PECL Signal Detect Inputs.
+2.5/3.3 V supply for PECL Signal Detect input
circuits. If Fiber Mode is not used (that is, G_FX/TP_L
is pulled Low), the VCCPECL pins may be tied to
GNDPECL to save power.
Analog Power Supply - Receive.
+2.5 V supply for all analog receive circuits.
Signal Description
Port 5 LED Drivers 1-3.
These pins drive LED indicators for Port 5. Each LED
can display one of several available status conditions
as selected by the LED Configuration Register (refer
to
Hex 14), on page 204
Port 6 LED Drivers 1-3.
These pins drive LED indicators for Port 6. Each LED
can display one of several available status conditions
as selected by the LED Configuration Register (refer
to
Hex 14), on page 204
Port 7 LED Drivers 1-3.
These pins drive LED indicators for Port 7. Each LED
can display one of several available status conditions
as selected by the LED Configuration Register (refer
to
Hex 14), on page 204
Table 97, LED Configuration Register (Address 20,
Table 97, LED Configuration Register (Address 20,
Table 97, LED Configuration Register (Address 20,
2,3
3.2 PQFP Signal Descriptions
for details).
for details).
for details).
Page 48
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