CYP15G0401TB-BGXI Cypress Semiconductor Corp, CYP15G0401TB-BGXI Datasheet - Page 16

• Manufacturer Part Number: CYP15G0401TB-BGXI
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYP15G0401TB-BGXI

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Document #: 38-02112 Rev. **
CYP15G0401TB DC Electrical Characteristics
Power Supply
Test Loads and Waveforms
CYP15G0401TB AC Characteristics
V
V
I
I
CYP15G0401TB Transmitter LVTTL Switching Characteristics Over the Operating Range
f
t
t
t
t
t
t
t
f
t
Notes:
CC
CC
12. Maximum I
13. Typical I
14. Cypress uses constant current (ATE) load configurations and forcing functions. This figure is for reference only. 5-pF differential load reflects tester capacitance,
15. The LVTTL switching threshold is 1.4V. All timing references are made relative to the point where the signal edges crosses the threshold voltage.
16. Tested initially and after any design or process changes that may affect these parameters, but not 100% tested.
17. The ratio of rise time to falling time must not vary by greater than 2:1.
18. For a given operating frequency, neither rise or fall specification can be greater than 20% of the clock-cycle period or the data sheet maximum time.
TS
TXCLK
TXCLKH
TXCLKL
TXCLKR
TXCLKF
TXDS
TXDH
TOS
TXCLKO
Parameter
OLC
ODIF
Parameter
Parameter
remote receive channel, and outputs unloaded.
sending a continuous alternating 01 pattern to the associated remote receive channel. The redundant outputs on each channel are powered down and the
parallel outputs are unloaded.
and is recommended at low data rates only.
GND
V
[16, 17, 18]
[16, 17, 18]
[16]
[16]
th
CC
= 1.4V
≤ 1 ns
CC
is measured under similar conditions except with V
is measured with V
Output LOW Voltage
(V
Output Differential Voltage
|(OUT+) – (OUT–)|
Power Supply Current
REFCLK = Max.
Power Supply Current
REFCLK = 125 MHz
R1 = 590Ω
R2 = 435Ω
C
(Includes fixture and
probe capacitance)
L
CC
(a) LVTTL Output Test Load
(c) LVTTL Input Test Waveform
≤ 7 pF
TXCLKx Clock Frequency
TXCLKx Period
TXCLKx HIGH Time
TXCLKx LOW Time
TXCLKx Rise Time
TXCLKx Fall Time
Transmit Data Set-Up Time to TXCLKx↑ (TXCKSEL ≠ LOW)
Transmit Data Hold Time from TXCLKx↑ (TXCKSEL ≠ LOW)
TXCLKO Clock Frequency = 1x or 2x REFCLK Frequency
TXCLKO Period
referenced)
2.0V
0.8V
CC
Description
Description
= MAX, with all TX channels and Serial Line Drivers enabled, sending a continuous alternating 01 pattern to the associated
3.0V
C
L
2.0V
0.8V
3.3V
Over the Operating Range
R1
R2
[14]
Description
[15]
PRELIMINARY
V
CC
th
≤ 1 ns
= 3.3V, T
= 1.4V
Commercial
Industrial
Commercial
Industrial
100Ω differential load
150Ω differential load
100Ω differential load
150Ω differential load
Over the Operating Range (continued)
A
= 25°C, with all TX channels enabled and one Serial Line Driver per transmit channel
Test Conditions
Test Conditions
(b) CML Output Test Load
R
L
= 100Ω
V
V
Typ.
Min.
19.5
6.66
6.66
CC
CC
2.2
2.2
0.2
0.2
1.7
0.8
20
Min.
610
590
450
560
CYP15G0401TB
– 1.4
– 1.4
[12]
R
L
[14]
V
V
Max.
CC
CC
51.28
51.28
Max.
Max.
1000
150
150
770
820
750
800
900
1.7
1.7
Page 16 of 30
– 0.7
– 0.7
[13]
Unit
MHz
MHz
Unit
Unit
mA
mA
mA
mA
mV
mV
ns
ns
ns
ns
ns
ns
ns
ns
V
V
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