HBLXT9785HC.C2 Intel, HBLXT9785HC.C2 Datasheet - Page 188
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HBLXT9785HC.C2
Manufacturer Part Number
HBLXT9785HC.C2
Description
Manufacturer
Intel
Datasheet
1.HBLXT9785HC.C2.pdf
(221 pages)
Specifications of HBLXT9785HC.C2
Lead Free Status / RoHS Status
Not Compliant
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LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
Figure 58
Table 79
Figure 59
Cortina Systems
Fast Link Pulse Timing
Auto-Negotiation and Fast Link Pulse Timing Parameters
MDIO Write Timing (MDIO Sourced by MAC)
®
Clock/Data pulse width
Clock pulse to Data pulse
Clock pulse to Clock pulse
FLP burst width
FLP burst to FLP burst
Clock/Data pulses per burst
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production
TPFOP
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
testing.
Parameter
MDIO
MDC
FLP Burst
t4
Sym
t1
t2
t3
t4
t5
–
55.5
t5
Min
111
17
–
–
8
Typ1
100
–
–
2
–
–
t1
Max
69.5
139
24
33
–
–
FLP Burst
t2
Units
ms
ms
ns
μ s
μ s
ea
6.0 Test Specifications
Test Conditions
–
–
–
–
–
–
Page 188
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