HBLXT9763HC.C4 Intel, HBLXT9763HC.C4 Datasheet - Page 37

• Manufacturer Part Number: HBLXT9763HC.C4
• Manufacturer: Intel

Specifications of HBLXT9763HC.C4

• Lead Free Status / RoHS Status: Not Compliant

1.13.4
Datasheet
EXTEST
IDCODE
SAMPLE
High Z
Clamp
BYPASS
1. The JEDEC ID is an 8-bit identifier. The MSB is for parity and is ignored.
Version
Intel’s JEDEC ID is FE (1111 1110) which becomes 111 1110.
Table 10. BSR Mode of Operation
Table 11. Supported JTAG Instructions
Table 12. Device ID Register
Name
31:28
0000
0000000000000000
1111111111111110
1111111111111110
1111111111001111
1111111111101111
1111111111111111
Boundary Scan Register
Each BSR cell has two stages. A flip-flop and a latch are used for the serial shift stage and the
parallel output stage. There are four modes of operation as listed in
Mode
1
2
3
4
Part ID (hex)
Code
27:12
2623
External Test
ID Code Inspection
Sample Boundary
Force Float
Clamp
Bypass Scan
Fast Ethernet 10/100 Hex Transceiver with Full MII — LXT9763
System Function
Description
Jedec Continuation Characters
Capture
Update
Shift
Description
0000
11:8
BSR
ID REG
BSR
Bypass
BSR
Bypass
Mode
JEDEC ID
111 1110
Table
7:1
10.
1
EXTEST
IDCODE
SAMPLE
High Z
Clamp
BYPASS
Data Register
Reserved
0
1
37