HBLXT9785HE.C2 Cortina Systems Inc, HBLXT9785HE.C2 Datasheet - Page 144

• Manufacturer Part Number: HBLXT9785HE.C2
• Manufacturer: Cortina Systems Inc

Specifications of HBLXT9785HE.C2

• Lead Free Status / RoHS Status: Supplier Unconfirmed

LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
4.9.3.2
Note:
4.9.3.3
4.9.3.4
4.9.3.5
4.9.3.6
4.9.3.6.1
Cortina Systems
The LXT9785/LXT9785E reports link failure via the Register status bits (1.2, 17.10, and
19.4) and interrupt functions. If auto-negotiate is enabled, link failure causes the device to
re-negotiate.
Link Failure Override
The LXT9785/LXT9785E normally transmits 100 Mbps data packets or Idle symbols only
if it detects the link is up, and transmits only FLP bursts if the link is not up. Setting bit
16.14 = 1 overrides this function, allowing the LXT9785/LXT9785E to transmit data
packets even when the link is down. This feature is provided as a diagnostic tool.
Auto-negotiation must be disabled to transmit data packets in the absence of link. If auto-
negotiation is enabled, the LXT9785/LXT9785E automatically begins transmitting FLP
bursts if the link goes down.
Carrier Sense/Data Valid (RMII)
The LXT9785/LXT9785E asserts CRS_DV whenever the respective port receiver is in a
non-idle state (as defined by the RMII Specification Revision 1.2), including false carrier
events. Assertion of CRS_DV is asynchronous with respect to REFCLK. In the event that
signal decoding is not complete when CRS_DV is asserted, the LXT9785/LXT9785E
outputs 00 on the RxData1:0 lines until the decoded data are available.
When the line returns to an idle state, CRS_DV is de-asserted synchronously with respect
to REFCLK. If the FIFO still contains data to be passed to the MAC via the RMII when
CRS is de-asserted, CRS_DV toggles on nibble boundaries until the FIFO is empty. For
100BASE-X signals, CRS_DV toggles at 25 MHz. For 10BASE-T signals, CRS_DV
toggles at 2.5 MHz.
Carrier Sense (SMII)
For 100BASE-TX and 100BASE-FX links, a Start-of-Stream Delimiter (SSD) or /J/K/
symbol pair causes assertion of carrier sense (CRS). An End-of-Stream Delimiter (ESD),
or /T/R/ symbol pair causes de-assertion of CRS. The PMA layer also de-asserts CRS if
IDLE symbols are received without /T/R/. In this event, receive error is indicated during
the IPG until the next packet is received.
For 10T links, CRS assertion is based on receipt of valid preamble, and de-assertion on
receipt of an End-of-Frame (EOF) marker.
Receive Data Valid (SMII)
The LXT9785/LXT9785E asserts the RX_DV bit when it receives a valid packet. However,
RxData outputs zeros until the received data are decoded and available for transfer to the
controller.
Twisted-Pair PMD Sublayer
The twisted-pair Physical Medium Dependent (PMD) layer provides the signal scrambling
and descrambling, line coding and decoding (MLT-3 for 100BASE-TX, Manchester for
10T), as well as receiving, polarity correction, and baseline wander correction functions.
Scrambler/Descrambler (100BASE-TX Only)
The purpose of the scrambler is to spread the signal power spectrum and further reduce
EMI using an 11-bit, non-data-dependent polynomial. The receiver automatically decodes
the polynomial whenever IDLE symbols are received.
®
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
4.9 100 Mbps Operation
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