SI3201-BSR Silicon Laboratories Inc, SI3201-BSR Datasheet - Page 42

• Manufacturer Part Number: SI3201-BSR
• Manufacturer: Silicon Laboratories Inc

Specifications of SI3201-BSR

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Si3216
The ProSLIC is designed to create a fully-balanced
ringing waveform, meaning that the TIP and RING
common mode voltage, (V
voltage is referred to as V
set to the following:
V
headroom by the ringing waveform with respect to the
V
Register 27 with an LSB voltage of 1.5 V/LSB.
Register 27 should be set with the calculated V
provide voltage headroom during ringing.
The ProSLIC has a mode to briefly increase the
maximum differential current limit between the voltage
transition of TIP and RING from ringing to a dc linefeed
state. This mode is enabled by setting I
Register 108, bit 7).
2.4.6. Ring Trip Detection
A ring trip event signals that the terminal equipment has
gone off-hook during the Ringing state. The ProSLIC
performs ring trip detection digitally using its on-chip A/
D converter. The functional blocks required to
implement ring trip detection are shown in Figure 23.
42
CMR
BATH
LCS
rail. The value is set as a 4-bit setting in indirect
is an indirect register, which provides the
V
BATH
Processor
Signal
V
Input
CM_RING
LFS
=
V
AC,PK
ISP_OUT
=
CM_RING
+
TIP
V
-------------------------------------- -
V
BATH
ROFF
+ V
2
–
RING
+
V
Digital
and is automatically
NRTP
LPF
CMR
V
OVR
)/2, is fixed. This
LIMEN
Figure 23. Ring Trip Detector
Threshold
= 1 (direct
Ring Trip
RPTP
OVR
+
–
Rev. 1.0
to
The primary input to the system is the Loop Current
Sense (LCS) value provided by the current monitoring
circuitry and reported in direct Register 79. LCS data is
processed by the input signal processor when the
ProSLIC is in the Ringing state as indicated by the
Linefeed Shadow register (direct Register 64). The data
then feeds into a programmable digital low pass filter,
which removes unwanted ac signal components before
threshold detection.
The output of the low-pass filter is compared to a
programmable threshold, RPTP (indirect Register 16).
The threshold comparator output feeds a programmable
debouncing filter. The output of the debouncing filter
remains in its present state unless the input remains in
the opposite state for the entire period of time
programmed by the ring trip debounce interval,
RTDI[6:0] (direct Register 70). If the debounce interval
has been satisfied, the RTP bit of direct Register 68 will
be set to indicate that a valid ring trip has occurred. A
ring trip interrupt is generated if enabled by the RTIE bit
(direct Register 22). Table 30 lists the registers that
must be written or monitored to correctly detect a ring
trip condition.
The recommended values for RPTP, NRTP, and RTDI
vary according to the programmed ringing frequency.
Register values for various ringing frequencies are
given in Table 31.
DBIRAW
Debounce
Filter
RTDI
RTP
Interrupt
Logic
RTIE
RTIP