82V1671JG8 IDT, Integrated Device Technology Inc, 82V1671JG8 Datasheet - Page 34
![no-image](/images/manufacturer_photos/0/3/324/idt__integrated_device_technology_inc_sml.jpg)
82V1671JG8
Manufacturer Part Number
82V1671JG8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.82V1671JG8.pdf
(107 pages)
Specifications of 82V1671JG8
Number Of Channels
4
On-hook Transmission
Yes
Polarity Reversal
Yes
On-chip Ring Relay Driver
Yes
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
PLCC
Operating Temperature Classification
Industrial
Pin Count
28
Mounting
Surface Mount
Operating Current
95mA
Operating Supply Voltage (max)
3.465V
Operating Supply Voltage (min)
3.135V
Lead Free Status / RoHS Status
Compliant
3.7.3
3.7.3.1
voice transmission, but for modem data transmission. The performance
of the latter is becoming a key performance for the increasing internet
access and other data applications. The chipset’s universal tone (fax/
modem tone) detection allows the use of modem-optimized filter for V.34
and V.90 connections.
unit per channel to detect fax and modem tones from the transmit or
receive path. The UTD unit can detect tone signals whose frequencies
are between 1500 Hz and 2600 Hz.
connection is about to be established, the lowpass filter (see
on page
modem data transmission is completed, the lowpass filter characteristic
will be switched back to the voice-optimized one for voice data
UTD_OK bit in LREG21 will be set to 1 and an interrupt will be
generated.
a time span of at least a Recognition Time (RTime, programmable by
LREG14) without occurring breaks longer than a Recognition Break
Time (RBRKTime, programmable by LREG15):
RSLIC & CODEC CHIPSET
The RSLIC-CODEC chipset provides optimized solution not only for
The CODEC provides an integrated Universal Tone Detection (UTD)
If a fax or modem tone is detected, which means that a modem
If a tone has been detected in the receive or transmit path, the
The UTD_OK bit will be set to 1 if all the following conditions hold for
• The in-band signal level is higher than out-band signal level.
• The in-band signal level is higher than the floor threshold
(programmable by word UTDthld_Floor in the Coe-RAM).
20) characteristic is changed to a modem-optimized one. If the
Signal In
UNIVERSAL TONE DETECTION (UTD)
Introduction
Programmable Bandpass Filter
Programmable Bandstop Filter
Figure - 17 UTD Functional Diagram
Figure - 9
|X|
|X|
34
transmission. With this mechanism implemented in the chipset, the
optimum modem transmission rate can always be achieved.
the V90 bit in register LREG5 is set to 1, this filter will be configured for
V90 connections (modem-optimized), otherwise it will be configured for
V34 connections (voice-optimized).
3.7.3.2
signal from transmit or receive path is first filtered by a programmable
bandpass filter and a programmable bandstop filter separately. The in-
band (upper path) and out-of-band (lower path) signals are then
separated from each other and the corresponding absolute values are
calculated. The two calculated results are sent to two integrators,
respectively. Finally, the evaluation logic block determines whether a
tone is detected by comparing the in-band level with the out-of-band
level.
is violated for at least a time span of an End Detection Time (ETime,
programmable by LREG16) during which the violation does not cease
for at least an End Detection Break Time (EBRKTime, programmable by
LREG17). Refer to
detection timing.
Integrator
Integrator
The characteristic of the lowpass filter can be changed by software. If
As shown in
• The in-band signal level is lower than the ceiling threshold
Figure - 18
The UTD_OK bit will be reset to 0 if one of the preceding conditions
(programmable by word UTDthld_Ceiling in the Coe-RAM).
UTD Principle
shows an example of UTD recognition timing.
Figure - 17
Evaluation Logic
Figure - 19
IDT82V1671/IDT82V1671A, IDT82V1074
(UTD Functional Block Diagram), the input
for an example of UTD tone end
Detection Result