82V1671JG IDT, Integrated Device Technology Inc, 82V1671JG Datasheet - Page 47
82V1671JG
Manufacturer Part Number
82V1671JG
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.82V1671JG.pdf
(107 pages)
Specifications of 82V1671JG
Number Of Channels
4
On-hook Transmission
Yes
Polarity Reversal
Yes
On-chip Ring Relay Driver
Yes
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
PLCC
Operating Temperature Classification
Industrial
Pin Count
28
Mounting
Surface Mount
Operating Current
95mA
Operating Supply Voltage (max)
3.465V
Operating Supply Voltage (min)
3.135V
Lead Free Status / RoHS Status
Compliant
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current flowing through the other line. This causes the calculated current
to be half of the actual value. Therefore in either Ring Open or Tip Open
mode the calculated current must be multiplied by a factor of 2.
RSLIC & CODEC CHIPSET
Because one line (Tip or Ring) is high impedance, there is only
The ramp generator is programmable by the Coe-RAM:
− Slope is programmable from 20 to 2000 V/s by word RampSlope;
− Start voltage is programmable from -70 to 70 V by word RingOffset;
− End voltage is programmable from -70 to 70 V by word RampEnd.
The following settings are necessary to generate a ramp signal:
1. Set the CODEC operating mode to RAMP (for both MPI and GCI
R
R
interfaces, LREG6: RAMP = 1).
Ring
Tip
I
GND
I
GND
=
=
V
V
TGDC
RGDC
⁄
⁄
------------------------------------------------------------------------- -
K
------------------------------------------------------------------------- -
K
ADDC
ADDC
LREG21: RAMP_OK
LREG8: RAMP_EN
LREG21: LM_OK
GREG16: LM_EN
×
×
Line Current
K
K
LM
INT
LM
INT
Result
×
Result
×
N
N
Ring
Samples
Tip
V
Samples
×
DC,START
×
2
2
Figure - 26 Capacitance Measurement
×
×
K
K
ITDC
ITDC
T
RING,DELAY
Programmable Voltage Slope
47
3.9.6.5
measure the capacitance. The ramp generator can generate required
voltage ramps to feed to the Ring and Tip lines.
voltage ramp and the voltage levels at the Ring and Tip lines.
V
V
• Ramp Generator
The RSLIC-CODEC chipset integrates a ramp generator to help to
2. Set the RSLIC operating mode to Internal Ring (for MPI interface,
3. Select desired ramp start voltage, end voltage and slope
Int. Period
TGDC:
RGDC:
LREG6: SCAN_EN = 1, SM[2:0] = 010; for GCI interface,
downstream C/I channel: SCAN_EN = 1, SM[2:0] = 010).
(LREG5: RG = 1, constant parameters for the ramp are selected;
LREG5: RG = 0, ramp parameters are programmed by the
Coefficient RAM, refer to
DC voltage applied to Tip/GND
DC voltage applied to Ring/GND.
Capacitance Measurement
V
DC,END
IDT82V1671/IDT82V1671A, IDT82V1074
Tip
Ring
Table - 23 on page 62
GND
V
V
BAT
BAT
RSLIC
/ 2
Figure - 26
for details).
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