MCP14E5T-E/SN Microchip Technology, MCP14E5T-E/SN Datasheet - Page 11
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MCP14E5T-E/SN
Manufacturer Part Number
MCP14E5T-E/SN
Description
IC,Dual MOSFET Driver,CMOS,SOP,8PIN,PLASTIC
Manufacturer
Microchip Technology
Type
Low Sider
Datasheet
1.MCP14E5-EP.pdf
(26 pages)
Specifications of MCP14E5T-E/SN
Configuration
Low-Side
Input Type
Inverting and Non-Inverting
Delay Time
46ns
Current - Peak
4A
Number Of Configurations
2
Number Of Outputs
2
Voltage - Supply
4.5 V ~ 18 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Rise Time
30 ns
Fall Time
30 ns
Supply Voltage (min)
4.5 V
Supply Current
2 mA
Maximum Power Dissipation
665 mW
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Number Of Drivers
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
High Side Voltage - Max (bootstrap)
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
MCP14E5T-E/SNTR
3.0
The descriptions of the pins are listed in
TABLE 3-1:
3.1
The MOSFET driver inputs are a high-impedance TTL/
CMOS compatible input. The inputs also have hystere-
sis between the high and low input levels, allowing
them to be driven from slow rising and falling signals
and to provide noise immunity.
3.2
Outputs A and B are CMOS push-pull outputs that are
capable of sourcing and sinking 4.0A of peak current
(V
gate of the MOSFET will stay in the intended state even
during large transients. These outputs also have a
reverse latch-up rating of 1.5A.
3.3
V
has a voltage range of 4.5V to 18V. This input must be
decoupled to ground with a local ceramic capacitor.
This bypass capacitor provides a localized low-imped-
ance path for the peak currents that are to be provided
to the load.
3.4
Ground is the device return pin. The ground pin(s)
should have a low impedance connection to the bias
supply source return. High peak currents will flow out
the ground pin(s) when the capacitive load is being
discharged.
© 2008 Microchip Technology Inc.
DD
Note:
DD
PDIP, SOIC
is the bias supply input for the MOSFET driver and
8-Pin
= 18V). The low output impedance ensures the
—
1
2
3
4
5
6
7
8
PIN DESCRIPTIONS
Control Inputs A and B
Outputs A and B
Supply Input (V
Ground (GND)
Duplicate pins must be connected for proper operation.
PIN FUNCTION TABLE
6x5 DFN
8-Pin
PAD
1
2
3
4
5
6
7
8
DD
)
Symbol
ENB_A
ENB_B
OUT B
OUT A
GND
IN A
IN B
V
NC
MCP14E3/MCP14E4/MCP14E5
DD
Table
3-1.
Output A Enable
Input A
Ground
Input B
Output B
Supply Input
Output A
Output B Enable
Exposed Metal Pad
3.5
The ENB_A pin is the enable control for Output A. This
enable pin is internally pulled up to V
operation and can be left floating for standard
operation. When the ENB_A pin is pulled below the
enable pin Low Level Input Voltage (V
will be in the off state regardless of the input pin state.
3.6
The ENB_B pin is the enable control for Output B. This
enable pin is internally pulled up to V
operation and can be left floating for standard
operation. When the ENB_B pin is pulled below the
enable pin Low-Level Input Voltage (V
will be in the off state regardless of the input pin state.
3.7
The exposed metal pad of the DFN package is not
internally connected to any potential. Therefore, this
pad can be connected to a ground plane or other
copper plane on a printed circuit board to aid in heat
removal from the package.
Enable A (ENB_A)
Enable B (ENB_B)
DFN Exposed Pad
Description
DS22062B-page 11
DD
DD
EN_L
EN_L
for active high
for active high
), Output A
), Output B