MIC1832NY Micrel Inc, MIC1832NY Datasheet - Page 6

• Manufacturer Part Number: MIC1832NY
• Description: P Supervisor, 2.88V Or 2.55V VTH, PDIP-08 (Lead-Free)
• Manufacturer: Micrel Inc
• Type: Simple Reset/Power-On Resetr

Specifications of MIC1832NY

• Number Of Voltages Monitored: 1
• Output: Open Drain or Open Collector
• Reset: Active High/Active Low
• Reset Timeout: 250 ms Minimum
• Voltage - Threshold: 2.55V, 2.88V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 8-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MIC1832
Applications Information
Power Monitor
The /RST and RST pins are asserted whenever V
below the reset threshold voltage as determined by the TOL
pin. A 5% tolerance level (4.62V reset threshold voltage) can
be selected by connecting the TOL pin to ground and a 10%
tolerance can be selected by connecting the TOL pin to V
The reset pins will remain asserted for a period of 250ms
after V
reset function ensures the microprocessor is properly reset
and powers up into a known condition after a power failure.
/RST will remain valid with V
Watchdog Timer
The microprocessor can be mounted by connecting the /ST
pin (watchdog input) to a bus line or I/O line. If a high-to-low
does not occur on the/ST pin within the watchdog timeout
Block Diagram
MIC1832
CC
has risen above the reset threshold voltage. The
PBRST (1)
V CC (8)
TOL (3)
TD (2)
ST (7)
CC
as low as 1.4V.
TRIP POINT
SELECT
MANUAL RESET
DEBOUNCE
REF
TIMEOUT
SELECT
-
+
CC
falls
CC
.
6
period (determined by the TD pin, see Table 1.), the /RST and
the RST will remain asserted for 250ms when this occurs. A
minimum pulse of 75ns or any transition high-to-low on the
/ST pin will reset the watchdog timer. The watchdog timer
will be reset if /ST sees a valid transition within the watchdog
timeout period.
Pushbutton Reset Input
The /PBRST input can be driven with a manual pushbutton
switch or with external logic signals. the input is internally
debounced and requires an active low signal to force the
reset outputs into their active states. The /PBRST input will
recognize any pulse that is 20ms in duration or greater and
will ignore all pulses that are less than 1ms in duration.
WATCHDOG
TIMER
GENERATOR
RESET
RST (6)
RST (5)
GND (4)
January 2006
Micrel, Inc.