PIC12F1840T-I/SN Microchip Technology, PIC12F1840T-I/SN Datasheet - Page 62

• Manufacturer Part Number: PIC12F1840T-I/SN
• Description: 7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core 8 SOI
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 12Fr

Specifications of PIC12F1840T-I/SN

• Core Processor: RISC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 5
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC12(L)F1840
REGISTER 5-2:
DS41441B-page 62
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
T1OSCR
R-1/q
T1OSCR: Timer1 Oscillator Ready bit
If T1OSCEN = 1:
1 = Timer1 oscillator is ready
0 = Timer1 oscillator is not ready
If T1OSCEN = 0:
1 = Timer1 clock source is always ready
PLLR 4x PLL Ready bit
1 = 4x PLL is ready
0 = 4x PLL is not ready
OSTS: Oscillator Start-up Time-out Status bit
1 = Running from the clock defined by the FOSC<2:0> bits of the Configuration Word 1
0 = Running from an internal oscillator (FOSC<2:0> = 100)
HFIOFR: High Frequency Internal Oscillator Ready bit
1 = HFINTOSC is ready
0 = HFINTOSC is not ready
HFIOFL: High Frequency Internal Oscillator Locked bit
1 = HFINTOSC is at least 2% accurate
0 = HFINTOSC is not 2% accurate
MFIOFR: Medium Frequency Internal Oscillator Ready bit
1 = MFINTOSC is ready
0 = MFINTOSC is not ready
LFIOFR: Low Frequency Internal Oscillator Ready bit
1 = LFINTOSC is ready
0 = LFINTOSC is not ready
HFIOFS: High Frequency Internal Oscillator Stable bit
1 = HFINTOSC is at least 0.5% accurate
0 = HFINTOSC is not 0.5% accurate
R-0/q
PLLR
OSCSTAT: OSCILLATOR STATUS REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
OSTS
R-q/q
HFIOFR
R-0/q
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
q = Conditional
HFIOFL
R-0/q
MFIOFR
R-q/q
 2011 Microchip Technology Inc.
LFIOFR
R-0/0
HFIOFS
R-0/q
bit 0