PIC12HV615-E/MF Microchip Technology, PIC12HV615-E/MF Datasheet - Page 22
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PIC12HV615-E/MF
Manufacturer Part Number
PIC12HV615-E/MF
Description
1.75KB Flash, 64B RAM, 6 I/O, 8MHz Internal Oscillator 8 DFN 3x3mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F609T-ISN.pdf
(212 pages)
2.PIC12F609T-ISN.pdf
(8 pages)
3.PIC12F609T-ISN.pdf
(26 pages)
4.PIC16F616T-ISL.pdf
(4 pages)
5.PIC16F616T-ISL.pdf
(8 pages)
Specifications of PIC12HV615-E/MF
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
5
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-DFN
Processor Series
PIC12H
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
5
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
- PIC12F609T-ISN PDF datasheet
- PIC12F609T-ISN PDF datasheet #2
- PIC12F609T-ISN PDF datasheet #3
- PIC16F616T-ISL PDF datasheet #4
- PIC16F616T-ISL PDF datasheet #5
- Current page: 22 of 212
- Download datasheet (2Mb)
2.2.2.5
The PIR1 register contains the Peripheral Interrupt flag
bits, as shown in Register 2-5.
REGISTER 2-5:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
PIC12F609/615/617/12HV609/615
DS41302D-page 22
Note 1: PIC12F615/617/HV615 only. PIC12F609/HV609 unimplemented, read as ‘0’.
U-0
—
PIR1 Register
Unimplemented: Read as ‘0’
ADIF: A/D Interrupt Flag bit
1 = A/D conversion complete
0 = A/D conversion has not completed or has not been started
CCP1IF: CCP1 Interrupt Flag bit
Capture mode:
1 = A TMR1 register capture occurred (must be cleared in software)
0 = No TMR1 register capture occurred
Compare mode:
1 = A TMR1 register compare match occurred (must be cleared in software)
0 = No TMR1 register compare match occurred
PWM mode:
Unused in this mode
Unimplemented: Read as ‘0’
CMIF: Comparator Interrupt Flag bit
1 = Comparator output has changed (must be cleared in software)
0 = Comparator output has not changed
Unimplemented: Read as ‘0’
TMR2IF: Timer2 to PR2 Match Interrupt Flag bit
1 = Timer2 to PR2 match occurred (must be cleared in software)
0 = Timer2 to PR2 match has not occurred
TMR1IF: Timer1 Overflow Interrupt Flag bit
1 = Timer1 register overflowed (must be cleared in software)
0 = Timer1 has not overflowed
ADIF
R/W-0
PIR1: PERIPHERAL INTERRUPT REQUEST REGISTER 1
(1)
W = Writable bit
‘1’ = Bit is set
CCP1IF
R/W-0
(1)
(1)
(1)
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
CMIF
(1)
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE of the INTCON register.
User
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
U-0
—
software
2010 Microchip Technology Inc.
x = Bit is unknown
TMR2IF
R/W-0
should
(1)
ensure
TMR1IF
R/W-0
bit 0
the
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