PIC16F1507-I/ML Microchip Technology, PIC16F1507-I/ML Datasheet - Page 214
PIC16F1507-I/ML
Manufacturer Part Number
PIC16F1507-I/ML
Description
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 QFN 4x4mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F1507-EML.pdf
(266 pages)
2.PIC16F1507-EML.pdf
(26 pages)
3.PIC16F1507-EML.pdf
(40 pages)
Specifications of PIC16F1507-I/ML
Processor Series
PIC16
Core
PIC16F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
3.5 KB
Data Ram Size
128 B
Interface Type
ICSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
3
Operating Supply Voltage
2.3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-20
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
-
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Eeprom Size
-
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F1507-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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DECFSZ
Syntax:
Operands:
Operation:
Status Affected:
Description:
GOTO
Syntax:
Operands:
Operation:
Status Affected:
Description:
INCF
Syntax:
Operands:
Operation:
Status Affected:
Description:
2011 Microchip Technology Inc.
Decrement f, Skip if 0
[ label ] DECFSZ f,d
0 f 127
d [ 0 , 1 ]
(f) - 1 (destination);
skip if result = 0
None
The contents of register ‘f’ are decre-
mented. If ‘d’ is ‘ 0 ’, the result is placed
in the W register. If ‘d’ is ‘ 1 ’, the result
is placed back in register ‘f’.
If the result is ‘ 1 ’, the next instruction is
executed. If the result is ‘ 0 ’, then a
NOP is executed instead, making it a
2-cycle instruction.
Unconditional Branch
[ label ]
0 k 2047
k PC<10:0>
PCLATH<4:3> PC<12:11>
None
GOTO is an unconditional branch. The
eleven-bit immediate value is loaded
into PC bits <10:0>. The upper bits of
PC are loaded from PCLATH<4:3>.
GOTO is a two-cycle instruction.
Increment f
[ label ]
0 f 127
d [ 0 , 1 ]
(f) + 1 (destination)
Z
The contents of register ‘f’ are incre-
mented. If ‘d’ is ‘ 0 ’, the result is placed
in the W register. If ‘d’ is ‘ 1 ’, the result
is placed back in register ‘f’.
GOTO k
INCF f,d
Preliminary
INCFSZ
Syntax:
Operands:
Operation:
Status Affected:
Description:
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
IORWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
PIC16(L)F1507
Increment f, Skip if 0
[ label ]
0 f 127
d [ 0 , 1 ]
(f) + 1 (destination),
None
The contents of register ‘f’ are incre-
mented. If ‘d’ is ‘ 0 ’, the result is placed
in the W register. If ‘d’ is ‘ 1 ’, the result
is placed back in register ‘f’.
If the result is ‘ 1 ’, the next instruction is
executed. If the result is ‘ 0 ’, a NOP is
executed instead, making it a 2-cycle
instruction.
Inclusive OR W with f
[ label ]
0 f 127
d [ 0 , 1 ]
(W) .OR. (f) (destination)
Z
Inclusive OR the W register with regis-
ter ‘f’. If ‘d’ is ‘ 0 ’, the result is placed in
the W register. If ‘d’ is ‘ 1 ’, the result is
placed back in register ‘f’.
skip if result = 0
Inclusive OR literal with W
[ label ]
0 k 255
(W) .OR. k (W)
Z
The contents of the W register are
OR’ed with the eight-bit literal ‘k’. The
result is placed in the W register.
INCFSZ f,d
IORWF
IORLW k
DS41586A-page 214
f,d
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