PIC16F1847-I/SO Microchip Technology, PIC16F1847-I/SO Datasheet - Page 339
PIC16F1847-I/SO
Manufacturer Part Number
PIC16F1847-I/SO
Description
14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core 18 S
Manufacturer
Microchip Technology
Datasheets
1.PIC16F1847-ISO.pdf
(408 pages)
2.PIC16F1847-ISO.pdf
(408 pages)
3.PIC16F1847-ISO.pdf
(10 pages)
Specifications of PIC16F1847-I/SO
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F1847-I/SO
Manufacturer:
MICROCHIP
Quantity:
30 000
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LSLF
Syntax:
Operands:
Operation:
Status Affected:
Description:
LSRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
2011 Microchip Technology Inc.
Logical Left Shift
[ label ] LSLF
0 f 127
d [0,1]
(f<7>) C
(f<6:0>) dest<7:1>
0 dest<0>
C, Z
The contents of register ‘f’ are shifted
one bit to the left through the Carry flag.
A ‘0’ is shifted into the LSb. If ‘d’ is ‘0’,
the result is placed in W. If ‘d’ is ‘1’, the
result is stored back in register ‘f’.
Logical Right Shift
[ label ] LSLF
0 f 127
d [0,1]
0 dest<7>
(f<7:1>) dest<6:0>,
(f<0>) C,
C, Z
The contents of register ‘f’ are shifted
one bit to the right through the Carry
flag. A ‘0’ is shifted into the MSb. If ‘d’ is
‘0’, the result is placed in W. If ‘d’ is ‘1’,
the result is stored back in register ‘f’.
0
C
register f
f {,d}
f {,d}
register f
C
Preliminary
0
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Words:
Cycles:
Example:
PIC16(L)F1847
Move f
[ label ]
0 f 127
d [0,1]
(f) (dest)
Z
The contents of register f is moved to
a destination dependent upon the
status of d. If d = 0,
destination is W register. If d = 1, the
destination is file register f itself. d = 1
is useful to test a file register since
status flag Z is affected.
1
1
After Instruction
MOVF
W =
Z
MOVF f,d
=
FSR, 0
value in FSR register
1
DS41453B-page 341
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