PIC16F1847-I/SO Microchip Technology, PIC16F1847-I/SO Datasheet - Page 3

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PIC16F1847-I/SO

Manufacturer Part Number
PIC16F1847-I/SO
Description
14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core 18 S
Manufacturer
Microchip Technology
Datasheets

Specifications of PIC16F1847-I/SO

Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Silicon Errata Issues
1. Module: Timer1
1.1 Timer1 Gate Toggle Mode with Timer0 as
2. Module: Timer1
2.1 Timer1 Gate Toggle mode
 2011-2012 Microchip Technology Inc.
Note:
Gate Source
Timer1 Gate Toggle mode provides unexpected
results when Timer0 overflow is selected as the
Timer1 gate source. We do not recommend using
Timer0 overflow as the Timer1 gate source while
in Timer1 Gate Toggle mode or when Toggle
mode is used in conjunction with Timer1 Gate
Single-Pulse mode.
Work around
None.
Affected Silicon Revisions
When Timer1 Gate Toggle mode is enabled, it is
possible to measure the full-cycle length of a
Timer1 gate signal. To perform this function, the
Timer1 gate source is routed through a flip-flop
that changes state on every incrementing edge of
the gate signal. Timer1 Gate Toggle mode is
enabled by setting the T1GTM bit of the T1GCON
register. When working properly, clearing either
the T1GTM bit or the TMR1ON bit would also clear
the output value of this flip-flop, and hold it clear.
This is done in order to control which edge is being
measured. The issue that exists is that clearing the
TMR1ON bit does not clear the output value of the
flip-flop and hold it clear.
Work around
Clear the T1GTM bit in the T1GCON register to
clear and hold clear the output value of the flip-flop.
Affected Silicon Revisions
A2
A2
X
X
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (A2).
3. Module: Oscillator
3.1 OSCSTAT bits: HFIOFR and HFIOFS
3.2 Clock Switching
When HFINTOSC is selected, the HFIOFR and
HFIOFS bits will become set when the oscillator
becomes ready and stable. Once these bits are
set,
HFINTOSC is always ready and stable. If the
HFINTOSC is disabled, the bits fail to be cleared.
Work around
None.
Affected Silicon Revisions
When switching clock sources between INTOSC
clock source and an external clock source, one
corrupted instruction may be executed after the
switch occurs.
This issue does not affect Two-Speed Start-up or
the Fail-Safe Clock Monitor operation.
Work around
When switching from an external oscillator clock
source, first switch to 16 MHz HFINTOSC. Once
running at 16 MHz HFINTOSC, configure IRCF to
run at desired internal oscillator frequency.
When switching from an internal oscillator
(INTOSC) to an external oscillator clock source,
first switch to HFINTOSC High-Power mode (8
MHz or 16 MHz). Once running from HFINTOSC,
switch to the external oscillator clock source.
Affected Silicon Revisions
A2
A2
X
X
they
PIC16(L)F1847
become
“stuck”,
DS80525B-page 3
indicating
that

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