PIC16F1934-I/MV Microchip Technology, PIC16F1934-I/MV Datasheet - Page 5
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PIC16F1934-I/MV
Manufacturer Part Number
PIC16F1934-I/MV
Description
7KB Flash, 256B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC16LF1933-ISS.pdf
(508 pages)
3.PIC16LF1933-ISS.pdf
(46 pages)
4.PIC16F1936-ISS.pdf
(2 pages)
5.PIC16F1936-ISS.pdf
(10 pages)
6.PIC16F1936-ISS.pdf
(40 pages)
7.PIC16F1936-ISS.pdf
(30 pages)
8.PIC16F1936-ISS.pdf
(12 pages)
Specifications of PIC16F1934-I/MV
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Processor Series
PIC16F
Core
PIC
Data Ram Size
256 B
Interface Type
MI2C, SPI, EUSART
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F1934-I/MV
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
5. Module: ADC
5.1 Analog-to-Digital Conversion
1.
2.
FIGURE 1:
2010 Microchip Technology Inc.
F
T
T
See the ADC Clock Period (T
chapter of the device data sheet.
An ADC conversion may not complete under these
conditions:
When F
clock source used for the ADC converter.
The ADC is operating from its dedicated internal
FRC oscillator and the device is not in Sleep
mode (any F
When this occurs, the ADC Interrupt Flag (ADIF)
does not get set, the GO/DONE bit does not get
cleared, and the conversion result does not get
loaded into the ADRESH and ADRESL result
registers.
Work around
In
required to complete the full conversion. Each T
cycle consists of 8 T
provided to stop the A/D conversion after 86
instruction cycles and terminate the conversion at
the correct time as shown in the figure above.
CY
AD
OSC
Figure
= 4/32 MHz = 125 nsec
= 1 µsec, ADCS = F
PIC16F1934/1936/1937 and PIC16LF1934/1936/1937
= 32 MHz
Method 1: Select the system clock, F
Method 2: Select
4 T
OSC
8 T
1 T
1, 88 instruction cycles (T
CY
CY
is greater than 8 MHz and it is the
OSC
AD
INSTRUCTION CYCLE DELAY CALCULATION EXAMPLE
the ADC clock source and reduce
the F
less
conversions.
oscillator as the ADC conversion
clock source and perform all
conversions with the device in
Sleep.
frequency).
CY
OSC
when
OSC
periods. A fixed delay is
the
frequency to 8 MHz or
/32
AD
performing
) vs. Device Operating Frequencies table, in the Analog-to-Digital Converter
88 T
dedicated
11 T
84 T
CY
CY
AD
CY
) will be
OSC
ADC
FRC
, as
AD
Method 3: This method is provided if the
application cannot use Sleep
mode and requires continuous
operation at frequencies above 8
MHz. This method requires early
termination of an ADC conver-
sion. Provide a fixed time delay in
software to stop the A-to-D
conversion manually, after all 10
bits are converted, but before the
conversion
automatically. The conversion is
stopped by clearing the GO/
DONE bit in software. The GO/
DONE bit must be cleared during
the last ½ T
conversion
completed automatically. Refer to
Figure 1
Stop the A/D conversion
between 10.5 and 11 T
cycles.
See the Analog-to-Digital
Conversion Timing diagram
in
Converter chapter of the
device data sheet.
the
for details.
AD
Analog-to-Digital
would
cycle, before the
DS80479F-page 5
would
complete
AD
have