PIC16F1937-E/MV Microchip Technology, PIC16F1937-E/MV Datasheet - Page 342

14KB Flash, 512B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE

PIC16F1937-E/MV

Manufacturer Part Number
PIC16F1937-E/MV
Description
14KB Flash, 512B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet

Specifications of PIC16F1937-E/MV

Processor Series
PIC16F
Core
PIC
Program Memory Type
Flash
Program Memory Size
14 KB
Data Ram Size
256 B
Interface Type
MI2C, SPI, EUSART
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
UQFN-40
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
PIC16(L)F1934/6/7
27.5
The LCD driver module can be configured into one of
four multiplex types:
• Static (only COM0 is used)
• 1/2 multiplex (COM<1:0> are used)
• 1/3 multiplex (COM<2:0> are used)
• 1/4 multiplex (COM<3:0> are used)
The LMUX<1:0> bit setting of the LCDCON register
decides which of the LCD common pins are used (see
Table 27-4
If the pin is a digital I/O, the corresponding TRIS bit
controls the data direction. If the pin is a COM drive,
then the TRIS setting of that pin is overridden.
TABLE 27-4:
27.6
The LCDSEn registers are used to select the pin
function for each segment pin. The selection allows
each pin to operate as either an LCD segment driver or
as one of the pin’s alternate functions. To configure the
pin as a segment pin, the corresponding bits in the
LCDSEn registers must be set to ‘1’.
If the pin is a digital I/O, the corresponding TRIS bit
controls the data direction. Any bit set in the LCDSEn
registers overrides any bit settings in the corresponding
TRIS register.
27.7
The LCDDATAx registers contain bits which define the
state of each pixel. Each bit defines one unique pixel.
Register 27-6
LCDDATAx registers to the respective common and
segment signals.
Any LCD pixel location not being used for display can
be used as general purpose RAM.
27.8
The rate at which the COM and SEG outputs change is
called the LCD frame frequency.
DS41364E-page 342
Multiplex
Note:
Static
1/2
1/3
1/4
LCD Multiplex Types
Segment Enables
Pixel Control
LCD Frame Frequency
for details).
On a Power-on Reset, these pins are
configured as normal I/O, not LCD pins.
LMUX
<1:0>
00
01
10
11
shows the correlation of each bit in the
COMMON PIN USAGE
Unused
Unused
Unused
COM3
Active
Unused
Unused
COM2
Active
Active
Unused
COM1
Active
Active
Active
TABLE 27-5:
TABLE 27-6:
Multiplex
Note:
LP<3:0>
Static
1/2
1/3
1/4
2
3
4
5
6
7
Clock source is F
LFINTOSC.
Clock source/(4 x 1 x (LPD Prescaler) x 32))
Clock source/(2 x 2 x (LPD Prescaler) x 32))
Clock source/(1 x 3 x (LPD Prescaler) x 32))
Clock source/(1 x 4 x (LPD Prescaler) x 32))
Static
FRAME FREQUENCY
FORMULAS
APPROXIMATE FRAME
FREQUENCY (IN Hz) USING
F
32.768 kHz OR LFINTOSC
122
 2008-2011 Microchip Technology Inc.
81
61
49
41
35
OSC
Frame Frequency =
@ 8 MHz, TIMER1 @
122
1/2
81
61
49
41
35
OSC
/256, T1OSC or
162
108
1/3
81
65
54
47
122
1/4
81
61
49
41
35

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