PIC16F1938-I/MV Microchip Technology, PIC16F1938-I/MV Datasheet - Page 4
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PIC16F1938-I/MV
Manufacturer Part Number
PIC16F1938-I/MV
Description
28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V 28 UQFN 4x4x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC16LF1933-ISS.pdf
(508 pages)
3.PIC16LF1933-ISS.pdf
(46 pages)
4.PIC16F1938-ISS.pdf
(10 pages)
Specifications of PIC16F1938-I/MV
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
28KB (16K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-UFQFN Exposed Pad
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
MI2C, SPI, EUSART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
25
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
DV164035, DV244005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F/LF1938/1939
EXAMPLE 1:
For other combinations of F
Instruction cycle delay counts, refer to Table 3.
TABLE 3:
DS80501A-page 4
BSF
BCF
MOVF
Note:
32 MHz
16 MHz
8 MHz
Affected Silicon Revisions
F
OSC
A1
X
ADCON0, ADGO
ADCON0, ADGO
ADRESH, W
The exact delay time will depend on the
choice of F
(ADCS) selection. The T
in the timing diagram above apply to this
example only. Refer to Table 3 for the
required
configurations.
INSTRUCTION CYCLE DELAY
COUNTS FOR OTHER F
AND T
F
F
F
F
F
F
F
OSC
OSC
OSC
OSC
OSC
OSC
OSC
T
CODE EXAMPLE OF
INSTRUCTION CYCLE
DELAY
AD
/64
/32
/64
/32
/16
/32
/16
delay
AD
OSC
; Start ADC conversion
; Provide 86
; Terminate the
; Read conversion
COMBINATIONS
Instruction Cycle Delay
instruction cycle
delay here
conversion manually
result
and the T
OSC
counts
, T
CY
Counts
AD
172
172
counts shown
86
86
43
86
43
for
values and
AD
OSC
divisor
other
2. Module: Enhanced Capture Compare
2.1 Enhanced PWM
2.2 Enhanced PWM
3. Module: Timer1
3.1 Timer1 Gate Toggle Mode with Timer0 as
When the PWM is configured for Full-Bridge mode
and the duty cycle is set to 0%, writing the
PxM<1:0> bits to change the direction has no
effect on PxA and PxC outputs.
Work around
Increase the duty cycle to a value greater than 0%
before changing directions.
Affected Silicon Revisions
In PWM mode, when the duty cycle is set to 0%
and the STRxSYNC bit is set, writing the STRxA,
STRxB, STRxC and the STRxD bits to enable/
disable steering to port pins has no effect on the
outputs.
Work around
Increase the duty cycle to a value greater than 0%
before enabling/disabling steering to port pins.
Affected Silicon Revisions
Gate Source
Timer1 Gate Toggle mode provides unexpected
results when Timer0 overflow is selected as the
Timer1 gate source. We do not recommend using
Timer0 overflow as the Timer1 gate source while in
Timer1 Gate Toggle mode or when Toggle mode is
used in conjunction with Timer1 Gate Single-Pulse
mode.
Work around
None.
Affected Silicon Revisions
A1
A1
A1
X
X
X
PWM (ECCP)
2010 Microchip Technology Inc.