PIC16F721-E/P Microchip Technology, PIC16F721-E/P Datasheet - Page 29
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PIC16F721-E/P
Manufacturer Part Number
PIC16F721-E/P
Description
7 KB FLASH, 256 B SRAM, 18 I/O 20 PDIP .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16LF720-ISS.pdf
(244 pages)
Specifications of PIC16F721-E/P
Core Processor
PIC
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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3.1
The PIC16F/LF720/721 has a noise filter in the MCLR
Reset path. The filter will detect and ignore small
pulses.
It should be noted that a Reset does not drive the
MCLR pin low.
Voltages applied to the pin that exceed its specification
can result in both MCLR Resets and excessive current
beyond the device specification during the ESD event.
For this reason, Microchip recommends that the MCLR
pin no longer be tied directly to V
network, as shown in
An internal MCLR option is enabled by clearing the
MCLRE bit in the Configuration Word register. When
MCLRE = 0, the Reset signal to the chip is generated
internally. When the MCLRE = 1, the RA3/MCLR pin
becomes an external Reset input. In this mode, the
RA3/MCLR pin has a weak pull-up to V
Serial Programming™ is not affected by selecting the
internal MCLR option.
FIGURE 3-2:
3.2
The on-chip POR circuit holds the chip in Reset until V
has reached a high enough level for proper operation. A
maximum rise time for V
Section 23.0 “Electrical Specifications”
the BOR is enabled, the maximum rise time specification
does not apply. The BOR circuitry will keep the device in
Reset until V
“Brown-Out Reset
When the device starts normal operation (exits the
Reset condition), device operating parameters (i.e.,
voltage, frequency, temperature, etc.) must be met to
ensure operation. If these conditions are not met, the
device must be held in Reset until the operating
conditions are met.
For additional information, refer to Application Note
AN607, “Power-up Trouble Shooting” (DS00607).
2010 Microchip Technology Inc.
V
DD
MCLR
Power-on Reset (POR)
R1
10 k
C1
0.1 F
DD
reaches V
(BOR)”).
Figure
RECOMMENDED MCLR
CIRCUIT
3-2, is suggested.
DD
BOR
DD
MCLR
. The use of an RC
is required. See
(see
PIC
®
MCU
DD
for details. If
Section 3.5
. In-Circuit
DD
3.3
The Power-up Timer provides a fixed 72 ms (nominal)
time out on power-up only, from POR or Brown-out
Reset. The Power-up Timer operates from the WDT
oscillator. For more information, see
“Internal Clock
long as PWRT is active. The PWRT delay allows the
V
PWRTE, can disable (if set) or enable (if cleared or pro-
grammed) the Power-up Timer. The Power-up Timer
should be enabled when Brown-out Reset is enabled,
although it is not required.
The Power-up Timer delay will vary from chip-to-chip
and vary due to:
• V
• Temperature variation
• Process variation
See
“Electrical
3.4
The WDT has the following features:
• Shares an 8-bit prescaler with Timer0
• Time-out period is from 17 ms to 2.2 seconds,
• Enabled by a Configuration bit
WDT is cleared under certain conditions described in
Table
3.4.1
The WDT derives its time base from 31 kHz internal
oscillator.
DD
Note:
nominal
DD
to rise to an acceptable level. A Configuration bit,
3-3.
DC
variation
PIC16F/LF720/721
Power-up Timer (PWRT)
Watchdog Timer (WDT)
Specifications”).
The Power-up Timer is enabled by the
PWRTE bit in the Configuration Word.
WDT OSCILLATOR
parameters
Modes”. The chip is kept in Reset as
for
details
DS41430A-page 29
(Section 23.0
Section 7.3
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