PIC16F723A-E/SS Microchip Technology, PIC16F723A-E/SS Datasheet - Page 28
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PIC16F723A-E/SS
Manufacturer Part Number
PIC16F723A-E/SS
Description
7 KB Flash, 1.8V-5.5V, 16 MHz Int. Osc. 28 SSOP .209in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16F722AT-ISS.pdf
(284 pages)
Specifications of PIC16F723A-E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC16F/LF722A/723A
TABLE 3-1:
TABLE 3-2:
DS41417A-page 28
Power-on Reset
MCLR Reset during normal operation
MCLR Reset during Sleep
WDT Reset
WDT Wake-up
Brown-out Reset
Interrupt Wake-up from Sleep
Legend: u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’.
Note 1:
POR
0
0
0
1
1
1
1
1
2:
When the wake-up is due to an interrupt and Global Enable bit (GIE) is set, the return address is pushed
on the stack and PC is loaded with the interrupt vector (0004h) after execution of PC + 1.
If a Status bit is not implemented, that bit will be read as ‘0’.
BOR
x
x
x
0
1
1
1
1
STATUS BITS AND THEIR SIGNIFICANCE
RESET CONDITION FOR SPECIAL REGISTERS
TO
1
0
x
1
0
0
u
1
Condition
PD
1
x
0
1
1
0
u
0
Power-on Reset or LDO Reset
Illegal, TO is set on POR
Illegal, PD is set on POR
Brown-out Reset
WDT Reset
WDT Wake-up
MCLR Reset during normal operation
MCLR Reset during Sleep or interrupt wake-up from Sleep
Program
PC + 1
Counter
PC + 1
0000h
0000h
0000h
0000h
0000h
Condition
(1)
(2)
0001 1xxx
000u uuuu
0001 0uuu
0000 1uuu
uuu0 0uuu
0001 1uuu
uuu1 0uuu
Register
STATUS
2010 Microchip Technology Inc.
---- --0x
---- --uu
---- --uu
---- --uu
---- --uu
---- --u0
---- --uu
Register
PCON
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