PIC16F726-E/ML Microchip Technology, PIC16F726-E/ML Datasheet - Page 18

• Manufacturer Part Number: PIC16F726-E/ML
• Description: 14KB Flash Program, 1.8V-5.5V, 16MHz Internal Oscillator, 8b ADC, CCP, I2C/SPI,
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F726-E/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 11 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC16F72X/PIC16LF72X
5.0
The PIC16F72X/PIC16LF72X
capability of storing eight 14-bit words in its data
latches. The data latches are internal to the
PIC16F72X/PIC16LF72X devices and are only used
for programming. The data latches allow the user to
program up to eight program words with a single Begin
Externally Timed Programming or Begin Internally
Timed Programming command. The Load Program
Data or the Load Configuration Word command is used
to load a single data latch. The data latch will hold the
data until Begin Externally Timed Programming or
Begin Internally Timed Programming command is
given.
FIGURE 5-1:
DS41332C-page 18
Command
Increment
Address
PROGRAMMING ALGORITHMS
Note 1: This step is optional if device has already been erased or has not been previously programmed.
No
ONE-WORD PROGRAMMING FLOWCHART
Program Cycle
All Locations
Bulk Erase
Memory
One-word
Program
Done?
Done
Start
devices have the
(1)
Yes
Advance Information
The data latches are aligned with the 3 LSb of the PC.
The address of the PC, at the time the Begin Externally
Timed Programming or Begin Internally Timed
Programming command is given, will determine which
location(s) in memory are written. Writes can not cross
a physical eight-word boundary.
attempting to write from PC 0002h-0009h will result in
data being written to 0008h-000Fh.
If more than 8 data latches are written without a Begin
Externally Timed Programming or Begin Internally
Timed Programming command the data in the data
latches will be overwritten. The following diagrams
show the recommended flowcharts for programming.
(Internally timed)
Programming
Command
Wait T
Begin
PINT
Program Memory
Program Cycle
Load Data
 2010 Microchip Technology Inc.
for
(Externally timed)
Programming
Programming
Wait T
Command
Wait T
Begin
End
PEXT
DIS
For example,