PIC16LF1518-E/SS Microchip Technology, PIC16LF1518-E/SS Datasheet - Page 114
PIC16LF1518-E/SS
Manufacturer Part Number
PIC16LF1518-E/SS
Description
28-pin, 28KB Flash, 1024B RAM, 10-bit ADC, 2xCCP, SPI, MI2C, EUSART, 1.8V-3.6V 2
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16LF1517-IPT.pdf
(344 pages)
Specifications of PIC16LF1518-E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
28KB (16K x 14)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
*
Processor Series
PIC16LF151x
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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PIC16(L)F1516/7/8/9
12.1
The Alternate Pin Function Control (APFCON)
registers are used to steer specific peripheral input and
output functions between different pins. The APFCON
registers are shown in
family, the following functions can be moved between
different pins.
• SS (Slave Select)
• CCP2
These bits have no effect on the values of any TRIS
register. PORT and TRIS overrides will be routed to the
correct pin. The unselected pin will be unaffected.
REGISTER 12-1:
DS41452A-page 114
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-2
bit 1
bit 0
U-0
—
Alternate Pin Function
Unimplemented: Read as ‘0’
SSSEL: Pin Selection bit
0 =
1 =
CCP2SEL: Pin Selection bit
0 =
1 =
U-0
SS function is on RA5
SS function is on RA0
CCP2 function is on RC1
CCP2 function is on RB3
—
APFCON: ALTERNATE PIN FUNCTION CONTROL REGISTER
Register
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
12-1. For this device
U-0
—
U-0
—
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U-0
—
U-0
—
2010 Microchip Technology Inc.
R/W-0/0
SSSEL
CCP2SEL
R/W-0/0
bit 0
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