PIC16LF1823-I/SL Microchip Technology, PIC16LF1823-I/SL Datasheet - Page 335

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PIC16LF1823-I/SL

Manufacturer Part Number
PIC16LF1823-I/SL
Description
3.5 KB Flash, 128 Bytes RAM, 32 MHz Int. Osc, 12 I/0, Enhanced Mid Range Core, N
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets

Specifications of PIC16LF1823-I/SL

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
MI2C, SPI, EUSART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
12
Number Of Timers
3
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF1823-I/SL
Manufacturer:
MICROCHIP
Quantity:
44
Part Number:
PIC16LF1823-I/SL
Manufacturer:
MICRO
Quantity:
20 000
LSLF
Syntax:
Operands:
Operation:
Status Affected:
Description:
LSRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
 2010 Microchip Technology Inc.
Logical Left Shift
[ label ] LSLF
0  f  127
d [0,1]
(f<7>)  C
(f<6:0>)  dest<7:1>
0  dest<0>
C, Z
The contents of register ‘f’ are shifted
one bit to the left through the Carry flag.
A ‘0’ is shifted into the LSb. If ‘d’ is ‘0’,
the result is placed in W. If ‘d’ is ‘1’, the
result is stored back in register ‘f’.
Logical Right Shift
[ label ] LSLF
0  f  127
d [0,1]
0  dest<7>
(f<7:1>)  dest<6:0>,
(f<0>)  C,
C, Z
The contents of register ‘f’ are shifted
one bit to the right through the Carry
flag. A ‘0’ is shifted into the MSb. If ‘d’ is
‘0’, the result is placed in W. If ‘d’ is ‘1’,
the result is stored back in register ‘f’.
0
C
register f
f {,d}
f {,d}
register f
PIC12F/LF1822/PIC16F/LF1823
C
Preliminary
0
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Words:
Cycles:
Example:
Move f
[ label ]
0  f  127
d  [0,1]
(f)  (dest)
Z
The contents of register f is moved to
a destination dependent upon the
status of d. If d = 0,
destination is W register. If d = 1, the
destination is file register f itself. d = 1
is useful to test a file register since
status flag Z is affected.
1
1
After Instruction
MOVF
W =
Z
MOVF f,d
=
FSR, 0
value in FSR register
1
DS41413B-page 335

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