PIC16LF1827-E/ML Microchip Technology, PIC16LF1827-E/ML Datasheet - Page 96
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC16LF1827-E/ML
Manufacturer Part Number
PIC16LF1827-E/ML
Description
18 Pin, 7 KB Flash, 384 Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range C
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Specifications of PIC16LF1827-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
PIC16LF
Core
PIC
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC16F/LF1826/27
8.5.6
The PIR1 register contains the interrupt flag bits, as
shown in Register 8-6.
REGISTER 8-6:
DS41391C-page 96
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
TMR1GIF
R/W-0/0
PIR1 REGISTER
TMR1GIF: Timer1 Gate Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
ADIF: A/D Converter Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
RCIF: USART Receive Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
TXIF: USART Transmit Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
SSP1IF: Synchronous Serial Port 1 (MSSP1) Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
CCP1IF: CCP1 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
TMR2IF: Timer2 to PR2 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
TMR1IF: Timer1 Overflow Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
R/W-0/0
ADIF
PIR1: PERIPHERAL INTERRUPT REQUEST REGISTER 1
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R-0/0
RCIF
R-0/0
TXIF
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-0/0
SSP1IF
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE, of the INTCON register.
User
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
R/W-0/0
CCP1IF
software
2010 Microchip Technology Inc.
R/W-0/0
TMR2IF
should
ensure
R/W-0/0
TMR1IF
bit 0
the
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