PIC16LF1936-E/SO Microchip Technology, PIC16LF1936-E/SO Datasheet - Page 99
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PIC16LF1936-E/SO
Manufacturer Part Number
PIC16LF1936-E/SO
Description
14KB Flash, 512B RAM, 256B EEPROM, LCD, NanoWatt XLP 28 SOIC .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Specifications of PIC16LF1936-E/SO
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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7.5.1
The INTCON register is a readable and writable
register, which contains the various enable and flag bits
for TMR0 register overflow, interrupt-on-change and
external INT pin interrupts.
REGISTER 7-1:
2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-0/0
GIE
INTCON REGISTER
GIE: Global Interrupt Enable bit
1 = Enables all active interrupts
0 = Disables all interrupts
PEIE: Peripheral Interrupt Enable bit
1 = Enables all active peripheral interrupts
0 = Disables all peripheral interrupts
TMR0IE: Timer0 Overflow Interrupt Enable bit
1 = Enables the Timer0 interrupt
0 = Disables the Timer0 interrupt
INTE: INT External Interrupt Enable bit
1 = Enables the INT external interrupt
0 = Disables the INT external interrupt
IOCIE: Interrupt-on-Change Enable bit
1 = Enables the interrupt-on-change
0 = Disables the interrupt-on-change
TMR0IF: Timer0 Overflow Interrupt Flag bit
1 = TMR0 register has overflowed
0 = TMR0 register did not overflow
INTF: INT External Interrupt Flag bit
1 = The INT external interrupt occurred
0 = The INT external interrupt did not occur
IOCIF: Interrupt-on-Change Interrupt Flag bit
1 = When at least one of the interrupt-on-change pins changed state
0 = None of the interrupt-on-change pins have changed state
R/W-0/0
PEIE
INTCON: INTERRUPT CONTROL REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-0/0
TMR0IE
R/W-0/0
INTE
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-0/0
IOCIE
PIC16F193X/LF193X
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE, of the INTCON register.
User software should ensure the appropri-
ate interrupt flag bits are clear prior to
enabling an interrupt.
R/W-0/0
TMR0IF
R/W-0/0
INTF
DS41364D-page 99
IOCIF
R-0/0
bit 0
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