PIC16LF1938-E/ML Microchip Technology, PIC16LF1938-E/ML Datasheet - Page 238

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PIC16LF1938-E/ML

Manufacturer Part Number
PIC16LF1938-E/ML
Description
28KB Flash, 1KB RAM, 256B EEPROM, LCD, NanoWatt XLP 28 QFN 6x6mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets

Specifications of PIC16LF1938-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
28KB (16K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F193X/LF193X
The I
features:
• Master mode
• Slave mode
• Byte NACKing (Slave mode)
• Limited Multi-master support
• 7-bit and 10-bit addressing
• Start and Stop interrupts
• Interrupt masking
• Clock stretching
• Bus collision detection
• General call address matching
• Address masking
• Address Hold and Data Hold modes
• Selectable SDA hold times
Figure 23-2 is a block diagram of the I
ule in Master mode. Figure 23-3 is a diagram of the I
interface module in Slave mode.
FIGURE 23-2:
DS41364D-page 238
2
C interface supports the following modes and
SDA
SCL
MSSP BLOCK DIAGRAM (I
SDA in
Bus Collision
SCL in
2
C interface mod-
Read
MSb
Generate (SSPCON2)
Address Match detect
Preliminary
Write collision detect
2
end of XMIT/RCV
Start bit, Stop bit,
State counter for
Clock arbitration
C
Start bit detect,
Stop bit detect
Acknowledge
2
SSPBUF
C™ MASTER MODE)
SSPSR
LSb
Write
Clock
Shift
data bus
Internal
Set/Reset: S, P, SSPSTAT, WCOL, SSPOV
Reset SEN, PEN (SSPCON2)
Set SSPIF, BCLIF
 2009 Microchip Technology Inc.
[SSPM 3:0]
Baud rate
generator
(SSPADD)

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