PIC16LF1939-E/PT Microchip Technology, PIC16LF1939-E/PT Datasheet - Page 64

28KB Flash, 1KB RAM, 256B EEPROM, LCD, NanoWatt XLP 44 TQFP 10x10x1mm TRAY

PIC16LF1939-E/PT

Manufacturer Part Number
PIC16LF1939-E/PT
Description
28KB Flash, 1KB RAM, 256B EEPROM, LCD, NanoWatt XLP 44 TQFP 10x10x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets

Specifications of PIC16LF1939-E/PT

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
28KB (16K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF1939-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC16F193X/LF193X
REGISTER 4-1:
DS41364D-page 64
bit 13
bit 6
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 13
bit 12
bit 11
bit 10-9
bit 8
bit 7
bit 6
bit 5
bit 4-3
Note 1:
FCMEN
R/P-1/1
R/P-1/1
MCLRE
2:
3:
Enabling Brown-out Reset does not automatically enable Power-up Timer.
The entire data EEPROM will be erased when the code protection is turned off during an erase.
The entire program memory will be erased when the code protection is turned off.
FCMEN: Fail-Safe Clock Monitor Enable bit
1 = Fail-Safe Clock Monitor is enabled
0 = Fail-Safe Clock Monitor is disabled
IESO: Internal External Switchover bit
1 = Internal/External Switchover mode is enabled
0 = Internal/External Switchover mode is disabled
CLKOUTEN: Clock Out Enable bit
1 = CLKOUT function is disabled. I/O or oscillator function on RA6/CLKOUT
0 = CLKOUT function is enabled on RA6/CLKOUT
BOREN<1:0>: Brown-out Reset Enable bits
11 = BOR enabled
10 = BOR enabled during operation and disabled in Sleep
01 = BOR controlled by SBOREN bit of the PCON register
00 = BOR disabled
CPD: Data Code Protection bit
1 = Data memory code protection is disabled
0 = Data memory code protection is enabled
CP: Code Protection bit
1 = Program memory code protection is disabled
0 = Program memory code protection is enabled
MCLRE: RE3/MCLR/V
If LVP bit = 1:
If LVP bit = 0:
PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
WDTE<1:0>: Watchdog Timer Enable bit
11 = WDT enabled
10 = WDT enabled while running and disabled in Sleep
01 = WDT controlled by the SWDTEN bit in the WDTCON register
00 = WDT disabled
This bit is ignored.
1 = RE3/MCLR/V
0 = RE3/MCLR/V
PWRTE
R/P-1/1
R/P-1/1
CONFIGURATION WORD 1
IESO
bit..
W = Writable bit
‘0’ = Bit is cleared
x = Bit is unknown
CLKOUTEN
PP
PP
PP
R/P-1/1
R/P-1/1
WDTE1
(3)
pin function is digital input; MCLR internally disabled; Weak pull-up under control of WPUE3
pin function is MCLR; Weak pull-up enabled.
Pin Function Select bit
(2)
(1)
Preliminary
BOREN1
WDTE0
R/P-1/1
R/P-1/1
(1)
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
P = Programmable bit
BOREN0
R/P-1/1
R/P-1/1
FOSC2
 2009 Microchip Technology Inc.
R/P-1/1
R/P-1/1
FOSC1
CPD
R/P-1/1
R/P-1/1
FOSC0
CP
bit 7
bit 0

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