PIC16LF722A-I/SO Microchip Technology, PIC16LF722A-I/SO Datasheet - Page 177

• Manufacturer Part Number: PIC16LF722A-I/SO
• Description: 3.5 KB Flash, 16 MHz Int. Osc, NanoWatt XLP 28 SOIC .300in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF722A-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width), 8 Leads
• Processor Series: PIC16LF
• Core: PIC
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

18.0
The Flash program memory is readable during normal
operation over the full V
data from program memory, five Special Function
Registers (SFRs) are used:
• PMCON1
• PMDATL
• PMDATH
• PMADRL
• PMADRH
EXAMPLE 18-1:
 2010 Microchip Technology Inc.
PROGRAM MEMORY READ
BANKSEL PMADRL ;
MOVF
MOVWF
MOVF
MOVWF
BANKSEL PMCON1 ;
BSF
NOP
NOP
BANKSEL PMDATL ;
MOVF
MOVWF
MOVF
MOVWF
MS_PROG_ADDR, W;
PMADRH ;MS Byte of Program Address to read
LS_PROG_ADDR, W;
PMADRL ;LS Byte of Program Address to read
PMCON1, RD;Initiate Read
PMDATL, W;W = LS Byte of Program Memory Read
LOWPMBYTE;
PMDATH, W;W = MS Byte of Program Memory Read
HIGHPMBYTE;
PROGRAM MEMORY READ
DD
range of the device. To read
;Any instructions here are ignored as program
;memory is read in second cycle after BSF
PIC16F/LF722A/723A
The value written to the PMADRH:PMADRL register
pair determines which program memory location is
read. The read operation will be initiated by setting the
RD bit of the PMCON1 register. The program memory
Flash controller takes two instructions to complete the
read. As a consequence, after the RD bit has been set,
the next two instructions will be ignored. To avoid
conflict with program execution, it is recommended that
the two instructions following the setting of the RD bit
are NOP. When the read completes, the result is placed
in the PMDATLH:PMDATL register pair. Refer to
Example 18-1 for sample code.
Note:
Code-protect does not effect the CPU
from performing a read operation on the
program memory. For more information,
refer to Section 8.2 “Code Protection”
DS41417A-page 177