PIC18F43K22-E/ML Microchip Technology, PIC18F43K22-E/ML Datasheet - Page 298

• Manufacturer Part Number: PIC18F43K22-E/ML
• Description: 8KB, Flash, 3968bytes-RAM,8-bit Family 44 QFN 8x8x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F43K22-E/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 30x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-VQFN Exposed Pad
• Processor Series: PIC18F
• Core: PIC
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18(L)F2X/4XK22
17.2.11
The following registers are used to control the
operation of the ADC.
REGISTER 17-1:
DS41412D-page 298
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-2
bit 1
Note:
U-0
—
ADC REGISTER DEFINITIONS
Analog pin control is determined by the
ANSELx registers (see
Unimplemented: Read as ‘0’
CHS<4:0>: Analog Channel Select bits
00000 = AN0
00001 = AN1
00010 = AN2
00011 = AN3
00100 = AN4
00101 = AN5
00110 = AN6
00111 = AN7
01000 = AN8
01001 = AN9
01010 = AN10
01011 = AN11
01100 = AN12
01101 = AN13
01110 = AN14
01111 = AN15
10000 = AN16
10001 = AN17
10010 = AN18
10011 = AN19
10100 = AN20
10101 = AN21
10110 = AN22
10111 = AN23
11000 = AN24
11001 = AN25
11010 = AN26
11011 = AN27
11100 = Reserved
11101 = CTMU
11110 = DAC
11111 = FVR BUF2 (1.024V/2.048V/2.096V Volt Fixed Voltage Reference)
GO/DONE: A/D Conversion Status bit
1 = A/D conversion cycle in progress. Setting this bit starts an A/D conversion cycle.
0 = A/D conversion completed/not in progress
R/W-0
This bit is automatically cleared by hardware when the A/D conversion has completed.
ADCON0: A/D CONTROL REGISTER 0
(1)
(1)
(1)
W = Writable bit
‘1’ = Bit is set
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
R/W-0
Register
10-2)
CHS<4:0>
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
 2010 Microchip Technology Inc.
x = Bit is unknown
GO/DONE
(2)
R/W-0
ADON
R/W-0
bit 0