PIC18F44K20-E/ML Microchip Technology, PIC18F44K20-E/ML Datasheet - Page 18

• Manufacturer Part Number: PIC18F44K20-E/ML
• Description: 16KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 44 QFN 8x8x0.9mm TUB
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F44K20-E/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F2XK20/4XK20
TABLE 1-2:
DS41303G-page 18
RB0/INT0/FLT0/AN12
RB1/INT1/AN10/C12IN3-
/P1C
RB2/INT2/AN8/P1B
RB3/AN9/C12IN2-/CCP2
RB4/KBI0/AN11/P1D
RB5/KBI1/PGM
RB6/KBI2/PGC
RB7/KBI3/PGD
Legend: TTL = TTL compatible input
Note 1: Default assignment for CCP2 when Configuration bit CCP2MX is set.
RB0
INT0
FLT0
AN12
RB1
INT1
AN10
C12IN3-
P1C
RB2
INT2
AN8
P1B
RB3
AN9
C12IN2-
CCP2
RB4
KBI0
AN11
P1D
RB5
KBI1
PGM
RB6
KBI2
PGC
RB7
KBI3
PGD
2: Alternate assignment for CCP2 when Configuration bit CCP2MX is cleared.
Pin Name
(2)
ST = Schmitt Trigger input with CMOS levels
O
= Output
PIC18F2XK20 PINOUT I/O DESCRIPTIONS (CONTINUED)
PDIP,
SOIC
Pin Number
21
22
23
24
25
26
27
28
QFN
18
19
20
21
22
23
24
25
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Buffer
CMOS
CMOS
CMOS
Type
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
ST
ST
ST
ST
ST
ST
ST
ST
PORTB is a bidirectional I/O port. PORTB can be software
programmed for internal weak pull-up on each input.
Digital I/O
External interrupt 1
Analog input 10, ADC channel 10
Comparators C1 and C2 inverting input
Enhanced CCP1 PWM output
Digital I/O
External interrupt 2
Analog input 8, ADC channel 8
Enhanced CCP1 PWM output
Digital I/O
Analog input 9, ADC channel 9
Comparators C1 and C2 inverting input
Capture 2 input/Compare 2 output/PWM 2 output
Digital I/O
Interrupt-on-change pin
Analog input 11, ADC channel 11
Enhanced CCP1 PWM output
Digital I/O
Interrupt-on-change pin
Low-Voltage ICSP™ Programming enable pin
Digital I/O
Interrupt-on-change pin
In-Circuit Debugger and ICSP™ programming clock pin
Digital I/O
Interrupt-on-change pin
In-Circuit Debugger and ICSP™ programming data pin
Digital I/O
External interrupt 0
PWM Fault input for CCP1
Analog input 12, ADC channel 12
CMOS = CMOS compatible input or output
I
P
= Input
= Power
Description
 2010 Microchip Technology Inc.