PIC18F44K22-I/MV Microchip Technology, PIC18F44K22-I/MV Datasheet - Page 154
![16KB, Flash, 768bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE](/photos/39/71/397183/pic18_sml.jpg)
PIC18F44K22-I/MV
Manufacturer Part Number
PIC18F44K22-I/MV
Description
16KB, Flash, 768bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18F44K22-I/MV
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 30x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-UFQFN Exposed Pad
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Number Of Programmable I/os
36
Number Of Timers
1 x 8-bit, 3 x 16-bit
Operating Supply Voltage
1.8 V to 5.5 V
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC18(L)F2X/4XK22
REGISTER 10-7:
REGISTER 10-8:
REGISTER 10-9:
DS41412D-page 154
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-3
bit 2-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-3
bit 2-0
Note 1:
WPUE3
TRISx7
R/W-1
R/W-1
U-0
—
Available on PIC18(L)F4XK22 devices only.
Register description for TRISA, TRISB, TRISC and TRISD.
Available on PIC18(L)F4XK22 devices only.
Unimplemented: Read as ‘0’
ANSE<2:0>: RE<2:0> Analog Select bit
1 = Digital input buffer disabled
0 = Digital input buffer enabled
TRISx<7:0>: PORTx Tri-State Control bit
1 = PORTx pin configured as an input (tri-stated)
0 = PORTx pin configured as an output
WPUE3: Weak Pull-up Register bits
1 = Pull-up enabled on PORT pin
0 = Pull-up disabled on PORT pin
Unimplemented: Read as ‘0’
TRISE<7:0>: PORTE Tri-State Control bit
1 = PORTE pin configured as an input (tri-stated)
0 = PORTE pin configured as an output
TRISx6
R/W-1
U-0
U-0
—
—
ANSELE – PORTE ANALOG SELECT REGISTER
TRISx: PORTx TRI-STATE REGISTER
TRISE: PORTE TRI-STATE REGISTER
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
TRISx5
R/W-1
U-0
U-0
—
—
TRISx4
R/W-1
U-0
U-0
Preliminary
—
—
(1)
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TRISx3
R/W-1
U-0
U-0
—
—
(1)
TRISE2
ANSE2
TRISx2
R/W-1
R/W-1
R/W-1
(1)
(1)
2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
TRISE1
ANSE1
TRISx1
R/W-1
R/W-1
R/W-1
(1)
(1)
TRISE0
ANSE0
TRISx0
R/W-1
R/W-1
R/W-1
bit 0
bit 0
bit 0
(1)
(1)
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