PIC18F65K22-E/PT Microchip Technology, PIC18F65K22-E/PT Datasheet - Page 374
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PIC18F65K22-E/PT
Manufacturer Part Number
PIC18F65K22-E/PT
Description
32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, GP 64 TQFP 10x10x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F65K22-EMR.pdf
(550 pages)
Specifications of PIC18F65K22-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F65K22-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC18F87K22 FAMILY
24.7
When a comparator is active and the device is placed
in Sleep mode, the comparator remains active and the
interrupt is functional, if enabled. This interrupt will
wake up the device from Sleep mode, when enabled.
Each operational comparator will consume additional
current.
TABLE 24-3:
DS39960D-page 374
INTCON
PIR6
PIE6
IPR6
CM1CON
CM2CON
CM3CON
CVRCON
CMSTAT
PORTF
LATF
TRISF
PORTG
LATG
TRISG
PORTH
LATH
TRISH
ANCON0
ANCON1
ANCON2
PMD0
Legend:
Note 1:
Name
Comparator Operation
During Sleep
Bit is available when Master Clear is disabled (MCLRE = 0 ). When MCLRE is set, the bit is unimplemented.
— = unimplemented, read as ‘ 0 ’.
CMP3OUT
GIE/GIEH
ANSEL15
ANSEL23
CCP3MD
ANSEL7
TRISH7
CVREN
TRISF7
LATH7
REGISTERS ASSOCIATED WITH COMPARATOR MODULE
LATF7
CON
CON
CON
Bit 7
RH7
RF7
—
—
—
—
—
—
PEIE/GIEL
CMP2OUT CMP1OUT
ANSEL14
ANSEL22
CCP2MD
ANSEL6
CVROE
TRISH6
TRISF6
LATH6
LATF6
Bit 6
COE
COE
COE
RH6
RF6
—
—
—
—
—
—
ANSEL13
ANSEL21
CCP1MD UART2MD UART1MD
ANSEL5
TMR0IE
TRISH5
CVRSS
TRISF5
RG5
LATH5
LATF5
CPOL
CPOL
CPOL
Bit 5
RH5
RF5
—
—
—
—
—
(1)
ANSEL12
ANSEL20
EVPOL1
EVPOL1
EVPOL1
ANSEL4
TRISG4
TRISH4
TRISF4
INT0IE
LATG4
LATH4
LATF4
CVR4
EEIF
EEIE
EEIP
Bit 4
RG4
RH4
RF4
—
To minimize power consumption while in Sleep mode,
turn off the comparators (CON = 0 ) before entering
Sleep. If the device wakes up from Sleep, the contents
of the CMxCON register are not affected.
24.8
A device Reset forces the CMxCON registers to their
Reset state. This forces both comparators and the
voltage reference to the OFF state.
ANSEL11
ANSEL19
EVPOL0
EVPOL0
EVPOL0
ANSEL3
TRISG3
TRISH3
TRISF3
LATG3
LATH3
LATF3
CVR3
RBIE
Bit 3
RG3
RF3
RH3
Effects of a Reset
—
—
—
—
ANSEL10
ANSEL18
SSP2MD
ANSEL2
CMP3IE
CMP3IP
2009-2011 Microchip Technology Inc.
TMR0IF
CMP3IF
TRISG2
TRISF2
TRISH2
LATG2
LATH2
LATF2
CREF
CREF
CREF
CVR2
Bit 2
RG2
RH2
RF2
—
ANSEL17
SSP1MD
ANSEL1
ANSEL9
CMP2IF
CMP2IE
CMP2IP
TRISG1
TRISH1
TRISF1
INT0IF
LATG1
LATH1
LATF1
CCH1
CCH1
CCH1
CVR1
Bit 1
RG1
RF1
RH1
—
ANSEL16
ANSEL0
ANSEL8
CMP1IE
CMP1IP
CMP1IF
TRISG0
ADCMD
TRISH0
LATG0
LATH0
CCH0
CCH0
CCH0
CVR0
RBIF
Bit 0
RG0
RH0
—
—
—
—
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