PIC18F67J90T-I/PT Microchip Technology, PIC18F67J90T-I/PT Datasheet - Page 211

• Manufacturer Part Number: PIC18F67J90T-I/PT
• Description: Segmented LCD, 128KB Flash, 4KB RAM, 12 MIPS, NanoWatt 64 TQFP 10x10x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F67J90T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3923 B
• Interface Type: AUSART, EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

18.0
18.1
The Master Synchronous Serial Port (MSSP) module is
a serial interface, useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers,
display drivers, A/D Converters, etc. The MSSP
module can operate in one of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I
The I
hardware:
• Master mode
• Multi-Master mode
• Slave mode
18.2
Each MSSP module has three associated control
registers. These include a status register (SSPSTAT)
and two control registers (SSPCON1 and SSPCON2).
The use of these registers and their individual bits differ
significantly depending on whether the MSSP module
is operated in SPI or I
Additional details are provided under the individual
sections.
 2010 Microchip Technology Inc.
- Full Master mode
- Slave mode (with general address call)
2
C interface supports the following modes in
MASTER SYNCHRONOUS
SERIAL PORT (MSSP)
MODULE
Master SSP (MSSP) Module
Overview
Control Registers
2
C mode.
2
C™)
PIC18F87J90 FAMILY
18.3
The SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. All four
modes
communication, typically three pins are used:
• Serial Data Out (SDO) – RC5/SDO/SEG12
• Serial Data In (SDI) – RC4/SDI/SDA/SEG16
• Serial Clock (SCK) – RC3/SCK/SCL/SEG17
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SS) – RF7/AN5/SS/SEG25
Figure 18-1 shows the block diagram of the MSSP
module when operating in SPI mode.
FIGURE 18-1:
SCK
SDO
SDI
SS
SPI Mode
of
SPI
Read
SS Control
are
Select
SMP:CKE
Edge
bit 0
Select
Edge
Enable
MSSP BLOCK DIAGRAM
(SPI MODE)
Data to TXx/RXx in SSPSR
TRIS bit
SSPBUF reg
2
supported.
SSPSR reg
Clock Select
SSPM<3:0>
4
2
DS39933D-page 211
(
Prescaler
4, 16, 64
TMR2 Output
To
Write
Clock
Shift
Data Bus
Internal
2
accomplish
T
OSC
)