PIC18F67K22-E/PT Microchip Technology, PIC18F67K22-E/PT Datasheet - Page 298

• Manufacturer Part Number: PIC18F67K22-E/PT
• Description: 128kB Flash, 4kB RAM, 1kB EE, NanoWatt XLP, GP 64 TQFP 10x10x1mm TRAY
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F67K22-E/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87K22 FAMILY
21.4.3.4
Unlike 5-bit masking, 7-Bit Address Masking mode
uses a mask of up to 8 bits (in 10-bit addressing) to
define a range of addresses that can be Acknowl-
edged, using the lowest bits of the incoming address.
This allows the module to Acknowledge up to
127 different addresses with 7-bit addressing, or 255
with 10-bit addressing (see
is the default configuration of the module, which is
selected when MSSPMSK is unprogrammed (‘1’).
The address mask for 7-Bit Address Masking mode is
stored in the SSPxMSK register, instead of the
SSPxCON2 register. SSPxMSK is a separate hard-
ware register within the module, but it is not directly
addressable. Instead, it shares an address in the SFR
space with the SSPxADD register. To access the
SSPxMSK register, it is necessary to select MSSP
mode, ‘1001’ (SSPxCON1<3:0> = 1001) and then
read or write to the location of SSPxADD.
To use 7-Bit Address Masking mode, it is necessary to
initialize SSPxMSK with a value before selecting the
I
sequence of events is:
1.
2.
3.
EXAMPLE 21-3:
DS39960D-page 298
2
C Slave Addressing mode. Thus, the required
7-Bit Addressing:
10-Bit Addressing:
Select
(SSPxCON2<3:0> = 1001).
Write the mask value to the appropriate
SSPADD register address (FC8h for MSSP1,
F6Eh for MSSP2).
Set
(SSPxCON2<3:0> = 0111 for 10-bit addressing,
‘0110’ for 7-bit addressing).
SSPxADD<7:1> = 1010 000
SSPxMSK<7:1> = 1111 001
Addresses Acknowledged = ACh, A8h, A4h, A0h
SSPxADD<7:0> = 1010 0000 (The two MSb are ignored in this example since they are not affected)
SSPxMSK<5:1> = 1111 0011
Addresses Acknowledged = ACh, A8h, A4h, A0h
the
7-Bit Address Masking Mode
SSPxMSK
appropriate
ADDRESS MASKING EXAMPLES IN 7-BIT MASKING MODE
Example
I
2
Access
C
21-3). This mode
Slave
mode
mode
Setting or clearing mask bits in SSPxMSK behaves in
the opposite manner of the ADMSK bits in 5-Bit
Address Masking mode. That is, clearing a bit in
SSPxMSK causes the corresponding address bit to be
masked; setting the bit requires a match in that
position. SSPxMSK resets to all ‘1’s upon any Reset
condition and, therefore, has no effect on the standard
MSSP operation until written with a mask value.
With 7-bit addressing, SSPxMSK<7:1> bits mask the
corresponding address bits in the SSPxADD register.
For
(SSPxMSK<n> = 0), the corresponding SSPxADD
address bit is ignored (SSPxADD<n> = x). For the
module to issue an address Acknowledge, it is
sufficient to match only on addresses that do not have
an active address mask.
With 10-bit addressing, SSPxMSK<7:0> bits mask the
corresponding address bits in the SSPxADD register.
For any SSPxMSK bits that are active (= 0), the corre-
sponding
(SSPxADD<n> = x).
Note:
any
The two Most Significant bits of the
address are not affected by address
masking.
SSPxADD
SSPxMSK
 2009-2011 Microchip Technology Inc.
address
bits
that
bit
are
is
ignored
active