PIC18LF13K22-E/SO Microchip Technology, PIC18LF13K22-E/SO Datasheet - Page 4

• Manufacturer Part Number: PIC18LF13K22-E/SO
• Description: 8KB Flash, 256bytes RAM, 256bytes EEPROM, 16MIPS, NanoWatt XLP 20 SOIC .300in TU
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF13K22-E/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SOIC (7.5mm Width)
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART, I2C, SPI
• Maximum Clock Frequency: 32 KHz
• Number Of Programmable I/os: 18
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• A/d Bit Size: 10 bit
• A/d Channels Available: 12
• Height: 2.05 mm
• Length: 12.8 mm
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.8 V, 2.7 V
• Width: 7.5 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F1XK22/LF1XK22
3.0
For the PIC18F14K22/LF14K22 device, the program
Flash
(16 Kbytes)
PIC18F13K22/LF13K22 device, the program Flash
space extends from 0000h to 01FFFh (8 Kbytes) in two
4-Kbyte blocks.
For the PIC18F14K22/LF14K22 addresses 0000h
through 0FFFh, however, define a “Boot Block” region
that is treated separately from Block 0. For the
PIC18F13K22/LF13K22 addresses 0000h through
07FFh, define the “Boot Block” region. All of these
blocks define code protection boundaries within the
program Flash space. The size of the Boot Block in the
PIC18F14K22/LF14K22 devices can be configured as
2K, or 4 Kbyte (see Figure 3-1). The size of the Boot
FIGURE 3-1:
DS41357B-page 4
space extends
MEMORY MAPS
Note 1: Sizes of memory areas are not to scale.
in
2: Boot Block size is determined by the BBSIZ bit in the CONFIG4L register.
01FFFFh
200000h
3FFFFFh
two
000000h
MEMORY MAP AND THE PROGRAM FLASH SPACE FOR PIC18F14K22/LF14K22
DEVICES
8-Kbyte
from 0000h to
Unimplemented
Program Flash
Configuration
Read as ‘0’
and ID
Space
(1)
blocks.
Advance Information
For
03FFFh
the
Unimplemented
Boot Block
BBSIZ = 1
Read ‘0’s
Block 0
Block 1
MEMORY SIZE/DEVICE
(PIC18F14K22)
Block in the PIC18F13K22/LF13K22 devices can be
configured as 1K, or 2 Kbytes (see Figure 3-1). This is
done through the BBSIZ bit in the Configuration regis-
ter, CONFIG4L. It is important to note that increasing
the size of the Boot Block decreases the size of the
Block 0.
TABLE 3-1:
16 Kbytes
(2)
PIC18F13K22/
PIC18F14K22/
Unimplemented
LF13K22
LF14K22
Device
Boot Block
BBSIZ = 0
Read ‘0’s
Block 0
Block 1
(2)
IMPLEMENTATION OF
PROGRAM FLASH
© 2009 Microchip Technology Inc.
Program Flash Size (Bytes)
0007FFh
000FFFh
001FFFh
003FFFh
01FFFFh
000000h
000800h
001000h
002000h
004000h
Address
Range
000000h-003FFFh (16K)
000000h-001FFFh (8K)