PIC18LF2458T-I/SO Microchip Technology, PIC18LF2458T-I/SO Datasheet

PIC18LF2458T-I/SO

Manufacturer Part Number

PIC18LF2458T-I/SO

Description

24KB Flash, 2KB RAM, 256 Bytes EEPROM, 24 I/O, USB, 12bit ADC 28 SOIC .300in T/R

Manufacturer

Microchip Technology

Series

PIC® 18Fr

Datasheets

1.PIC18F2221-ISO.pdf (46 pages)

2.PIC18F2458-ISO.pdf (46 pages)

3.PIC18F2458-ISO.pdf (6 pages)

4.PIC18F2458-ISO.pdf (6 pages)

5.PIC18F2458-ISO.pdf (6 pages)

Specifications of PIC18LF2458T-I/SO

Core Processor

PIC

Core Size

8-Bit

Speed

48MHz

Connectivity

I²C, SPI, UART/USART, USB

Peripherals

Brown-out Detect/Reset, HLVD, POR, PWM, WDT

Number Of I /o

Program Memory Size

24KB (12K x 16)

Program Memory Type

FLASH

Eeprom Size

256 x 8

Ram Size

2K x 8

Voltage - Supply (vcc/vdd)

2 V ~ 5.5 V

Data Converters

A/D 10x12b

Oscillator Type

Internal

Operating Temperature

-40°C ~ 85°C

Package / Case

28-SOIC (7.5mm Width)

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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The PIC18F2458/2553/4458/4553 Rev. B5 parts you

have received conform functionally to the Device Data

Sheet

described below. Any Data Sheet Clarification issues

related to the PIC18F2458/2553/4458/4553 will be

reported in a separate Data Sheet errata. Please check

the Microchip web site for any existing issues.

The

PIC18F2458/2553/4458/4553 devices with these

Device/Revision IDs:

All of the issues listed here will be addressed in future

revisions of the PIC18F2458/2553/4458/4553 silicon.

TABLE 1:

Param

The Device IDs (DEVID1 and DEVID2) are located at

addresses

configuration space. They are shown in hexadecimal

in the format “DEVID2 DEVID1”.

No.

Note:

Part Number

PIC18F2458

PIC18F2553

PIC18F4458

PIC18F4553

following

(DS39887B),

Symbol

PIC18F2458/2553/4458/4553 Rev. B5 Silicon Errata

The “PIC18F2458/2553/4458/4553 Data

Sheet”

“PIC18F2455/2550/4455/4550 Data Sheet”

(DS39632). PIC18F2458/2553/4458/4553

features and specifications that are

shared with the PIC18F2455/2550/4455/

4550

the “PIC18F2455/2550/4455/4550 Data

Sheet”.

3FFFFEh:3FFFFFh

EXAMPLE SPI MODE REQUIREMENTS (SLAVE MODE TIMING)

silicon

devices

SS ↓ to SCK ↓ or SCK ↑ Input

10 1010 011

10 1010 010

10 1010 001

10 1010 000

Device ID

except

supplemented

errata apply

are

for

documented

the

PIC18F2458/2553/4458/4553

Revision ID

the

Characteristic

0 0101

anomalies

only

device’s

the

1. Module: MSSP

In SPI Slave mode with slave select enabled

(SSPM<3:0> = 0100), the minimum time between

the falling edge of the SS pin and first SCK edge

“PIC18F2455/2550/4455/4550

(DS39632). The updated specification is shown in

bold in Table 1.

The minimum time between SS pin low and an

SSPBUF write is also 3 T

the SS pin occurs greater than 3 T

first SCK edge or loading SSPBUF, the peripheral

will function correctly. Also, if SSPBUF is written

prior to the SS pin going low, the peripheral will

function correctly.

Work around

None.

Date Codes that pertain to this issue:

All engineering and production devices.

greater

Table 28-17

3 T

than

Min

and

specified

Max Units Conditions

—

Table 28-18

. If the falling edge of

DS80323D-page 1

Data

parameter 70

, before the

Sheet”

the

Related parts for PIC18LF2458T-I/SO

PIC18LF2458T-I/SO Summary of contents

Page 1

... SS ↓ to SCK ↓ or SCK ↑ Input © 2008 Microchip Technology Inc. PIC18F2458/2553/4458/4553 1. Module: MSSP In SPI Slave mode with slave select enabled the anomalies (SSPM<3:0> = 0100), the minimum time between the falling edge of the SS pin and first SCK edge is greater in Table 28-17 “ ...

Page 2

... Work around None. Date Codes that pertain to this issue: All engineering and production devices. (of the master) after the starting OSC IL (Differential DL , OSC , and avoid OSC OSC or RC modes. OSC DD value specified BOR is 120 mV below the specified © 2008 Microchip Technology Inc. ...

Page 3

... Experimentation and thorough encouraged. Date Codes that pertain to this issue: All engineering and production devices. © 2008 Microchip Technology Inc. PIC18F2458/2553/4458/4553 8. Module: MSSP When operated in I baud rate may be somewhat slower than predicted by the following formula Master mode, clock ...

Page 4

... Initial release of this document. Silicon issues 1-2 (MSSP), 3 (ECCP – PWM Mode), 4 (EUSART) and 5 (ADC). Rev B Document (3/2008) Added silicon issue 6 Electrical Characteristics (BOR). Rev C Document (4/2008) Added silicon issue 7 (MSSP – SPI Slave). Rev D Document (9/2008) Added silicon issue 8 (MSSP). DS80323D-page 4 © 2008 Microchip Technology Inc. ...

Page 5

... PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 6

... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2008 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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