PIC18LF4458-I/P Microchip Technology, PIC18LF4458-I/P Datasheet - Page 19

24KB Flash, 2KB RAM, 256 Bytes EEPROM, 35 I/O, USB, 12bit ADC 40 PDIP .600in TUB

PIC18LF4458-I/P

Manufacturer Part Number
PIC18LF4458-I/P
Description
24KB Flash, 2KB RAM, 256 Bytes EEPROM, 35 I/O, USB, 12bit ADC 40 PDIP .600in TUB
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF4458-I/P

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
24KB (12K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF4458-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
TABLE 1-3:
© 2009 Microchip Technology Inc.
RD0/SPP0
RD1/SPP1
RD2/SPP2
RD3/SPP3
RD4/SPP4
RD5/SPP5/P1B
RD6/SPP6/P1C
RD7/SPP7/P1D
Legend: TTL = TTL compatible input
Note 1:
RD0
SPP0
RD1
SPP1
RD2
SPP2
RD3
SPP3
RD4
SPP4
RD5
SPP5
P1B
RD6
SPP6
P1C
RD7
SPP7
P1D
2:
3:
Pin Name
ST = Schmitt Trigger input with CMOS levels
O
Alternate assignment for CCP2 when CCP2MX Configuration bit is cleared.
Default assignment for CCP2 when CCP2MX Configuration bit is set.
These pins are No Connect unless the ICPRT Configuration bit is set. For NC/ICPORTS, the pin is No
Connect unless ICPRT is set and the DEBUG Configuration bit is cleared.
= Output
PIC18F4458/4553 PINOUT I/O DESCRIPTIONS (CONTINUED)
PDIP QFN TQFP
19
20
21
22
27
28
29
30
Pin Number
38
39
40
41
2
3
4
5
38
39
40
41
2
3
4
5
PIC18F2458/2553/4458/4553
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
Buffer
Type
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
ST
ST
ST
ST
ST
ST
ST
ST
CMOS = CMOS compatible input or output
I
P
PORTD is a bidirectional I/O port or a Streaming
Parallel Port (SPP). PORTD can be software
programmed for internal weak pull-ups on all inputs.
These pins have TTL input buffers when the SPP
module is enabled.
Digital I/O.
Streaming Parallel Port data.
Digital I/O.
Streaming Parallel Port data.
Digital I/O.
Streaming Parallel Port data.
Digital I/O.
Streaming Parallel Port data.
Digital I/O.
Streaming Parallel Port data.
Digital I/O.
Streaming Parallel Port data.
ECCP1 PWM output, channel B.
Digital I/O.
Streaming Parallel Port data.
ECCP1 PWM output, channel C.
Digital I/O.
Streaming Parallel Port data.
ECCP1 PWM output, channel D.
= Input
= Power
Description
DS39887C-page 19

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